PDK & Pcell Design Engineer — Automation & EDA

GLOBALFOUNDRIES SINGAPORE PTE. LTD.; Singapore; On-site; SGD 90,000 - 120,000; Full time

Job summary

GlobalFoundries Singapore seeks a Design Enablement Engineer to develop design components for the Device library of Process Design Kits (PDKs) and to maintain PDK tech files with runtime code readable by EDA tools.

You will review process design rules, create spec data for PDK development and ensure quality through rigorous test cases for DRC/LVS, release notes and documentation. Collaboration with a team of innovators may open avenues for patents.

Qualifications

• Bachelor’s degree in electrical engineering, Microelectronics, Physics, Computer Science or equivalent.
• 6 years’ experience in semiconductor and/or EDA industries.
• Master’s degree in electrical engineering, Microelectronics, Physics, Computer Science or equivalent preferred.
• Good knowledge of electronic devices and semiconductor theory.
• Experience with CAD systems in Electronics (Cadence IC, Cadence OrCAD, Protel or similar).
• Experience with scripting languages (Perl, Tcl, Bash...) is a plus.
• Exposure to Cadence IC (Virtuoso Layout, Schematic or Cadence Skill programming language) is a great advantage.
• Previous experience with Unix/Linux systems is also a plus.
• Knowledge in ML or GenAI is a great advantage.
• Knowledge in Cadence Skill and pcell development.
• Excellent technical problem‑solving skills.
• Good attitude and interpersonal skills, tactful and works well in a team environment.
• Self‑motivated, resourceful and shows initiative.
• Well organized and exhibits attention to detail.

Responsibilities

• Developing design components for Device library of PDKs.
• Develop, deploy, support, maintain PDK collection of tech files and runtime code readable by EDA tools.
• Develop, deploy, support, maintain automation tools that represent the Fab process.
• Review and interpret process design rules and SPICE model documents to create spec data for PDK development.
• Create and maintain test cases for Process Design Kits / DRC / LVS and perform QA checks for error‑free deliveries.
• Create and update release notes and application notes, documenting known limitations, issues and solutions.
• Collaborate with an established group of innovators and contribute ideas potentially leading to patents.

Skills

Cadence IC

Cadence OrCAD

Perl/Tcl/Bash

Unix/Linux

Cadence Virtuoso

ML/GenAI

pcell development

Education

Bachelor's degree in Electrical Engineering

Master’s degree (preferred)

Tools

Cadence IC

Cadence Skill

Protel

Job description

GlobalFoundries Singapore seeks a Design Enablement Engineer to develop design components for the Device library of Process Design Kits (PDKs) and to maintain PDK tech files with runtime code readable by EDA tools.

You will review process design rules, create spec data for PDK development and ensure quality through rigorous test cases for DRC/LVS, release notes and documentation. Collaboration with a team of innovators may open avenues for patents.