Layout Engineer

BITMAIN; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

Bitmain in Singapore is seeking an IC layout design engineer to drive layout planning for analog and mixed-signal circuits. You will independently perform DRC, LVS, ERC and other verification tasks while collaborating with analog design engineers to optimize layouts.

You will also prepare and maintain documentation to support design activities. The ideal candidate holds a bachelor’s degree or higher with IC layout experience, is proficient with Linux, and has hands-on experience with Cadence and

Qualifications

• Bachelor’s degree or above with IC layout experience.
• Proficient in Linux and layout verification tools Cadence and Calibre.
• Experience in 8nm or smaller process nodes preferred.
• SRAM layout experience is a plus.
• Strong communication and teamwork skills.

Responsibilities

• Layout planning and design of analog and mixed-signal circuit modules.
• Perform DRC, LVS, ERC, and other layout verification tasks.
• Collaborate with analog circuit design engineers to ensure layout optimization.
• Prepare and maintain relevant technical documentation.

Skills

IC layout

DRC/LVS/ERC

Linux

Communication

Education

Bachelor's degree or above in relevant field

Tools

Cadence

Calibre

Job description

Responsibility

• Responsible for layout planning and design of analog and mixed-signal circuit modules
• Independently perform DRC, LVS, ERC, and other layout verification tasks
• Work closely with analog circuit design engineers to ensure effective communication and layout optimization
• Prepare and maintain relevant technical documentation

Requirement

• Bachelor’s degree or above, with relevant experience in IC layout design
• Proficient in Linux systems and skilled in using verification tools such as Cadence and Calibre
• Experience with 8nm or smaller process nodes is preferred
• Experience in SRAM layout design is a plus
• Strong communication and teamwork skills