Analog Layout Engineer

TRULYYY PTE. LTD.; Singapore; On-site; SGD 80,000 - 120,000; Full time

Job summary

TRULYYY PTE. LTD. in Singapore is seeking Analog Layout Engineers of varying seniority to lead physical layout executions and signoff on physical implementation of analog and mixed-signal modules.

The role requires hands-on experience with sub-8nm processes, floorplanning, placement and custom routing, plus independent execution of DRC, LVS and ERC verification.

Qualifications

• Bachelor's degree in electronic engineering or semiconductors.
• 2–8 years with analog layouts at either OEMs, ODMs, or Fabless companies.

Responsibilities

• Lead floor planning, placement and custom physical routing for analog and mixed-signal macro modules.
• Independently execute full physical verification suites, including DRC, LVS and ERC.

Skills

Analog layout

Floorplanning

Placement

Education

Bachelors in EE

Tools

DRC

LVS

ERC

Job description

Analog Layout Engineer

About the Role

Join a global leader in chip design and high end IC components. We are looking for Analog Layout Engineers of different seniority levels to lead physical layout executions and signoff on physical execution

Key Responsibilities

• Lead floor planning, placement and custom physical routing for analog and mixed-signal macro modules.
• Independently execute full physical verification suites, including Design Rule Checking (DRC), Layout Versus Schematic (LVS) and Electrical Rule Checking (ERC).

Requirements

• Bachelor's degree in electronic engineering or semiconductors
• 2-8 years with analog layouts at either OEMs, ODMs, or Fabless companies
• Hands-on experience designing on sub-8nm advanced process nodes (FinFET); exposure to memory structures (SRAM) is a strong advantage.

Referrals are greatly appreciated.

Regrettably, only shortlisted candidates will be notified.

Please note that data provided is for recruitment purposes only.

Business Registration No.: 202004228R | License No.: 20S0118 | EA Registration No.: R2210710