Layout Design Engineer

SiLith

Singapore

On-site

SGD 40,000 - 70,000

Full time

6 days ago
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Job summary

Silith in Singapore is seeking a motivated Layout Engineer to translate circuit designs into physical layouts, supporting modules up to full-chip integration and tape-out. You will work closely with design engineers, read foundry process flows, and contribute to layout guidelines, verification procedures, and design documentation.

Fresh graduates are welcome, with internship or project exposure in semiconductors a plus.

Qualifications

  • Bachelor's degree in microelectronics, electronic engineering or related field.
  • Fresh graduates welcome; internship/project experience in semiconductors a plus.
  • Ability to read foundry process flows and DRC/documents; understands device structures.

Responsibilities

  • Translate design specifications to physical layout designs.
  • Run layout activities from modules to top-level placement and routing.
  • Collaborate with design engineers to meet layout requirements and drive tape-out readiness.
  • Develop and maintain layout guidelines, inspection checklists, and verification procedures.
  • Archive layout design records and ensure proper documentation.

Skills

Layout design
Python scripting
Device structures
Process flows

Education

Bachelor's Degree in Microelectronics or Electronic Engineering

Tools

Calibre DRC

Job description

We are looking for a motivated and detail-oriented Layout Engineer to join our team. In this role, you will work closely with design engineers to translate circuit design specifications into high-quality layout designs, contributing to everything from individual circuit modules to full-chip integration and tape-out.

Key Responsibilities

We are looking for a motivated and detail-oriented Layout Engineer to join our team. In this role, you will work closely with design engineers to translate circuit design specifications into high-quality layout designs, contributing to everything from individual circuit modules to full-chip integration and tape-out.

Key Responsibilities
  • Translate design specifications into physical layout designs.
  • Perform layout design activities from lower-level circuit modules to top-level placement, routing, and verification.
  • Collaborate closely with design engineers to understand layout requirements, support floor planning, and deliver layout designs for circuit modules and full-chip integration.
  • Develop and maintain layout design guidelines, inspection checklists, and verification procedures.
  • Maintain proper design documentation and ensure systematic archiving of layout design records.
  • Support and coordinate project tape-out activities.
  • Undertake other ad-hoc duties as assigned by supervisors.
Requirements
  • Bachelor's Degree in Microelectronics, Electronic Engineering, or a related discipline.
  • Fresh graduates are welcome to apply. Candidates with relevant internship, industrial attachment, or project experience in the semiconductor industry will have an added advantage.
  • Ability to read and interpret foundry process flows and design rule documents, with a good understanding of device structures in the relevant process technology.
  • Knowledge of standard cell library development.
  • Experience or knowledge of Python programming for layout design and automation.
  • Experience or knowledge in developing Calibre DRC runset scripts.
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