IC Verification Lead — RTL, VIP & Coverage Champion

Bitdeer Technologies Group; Singapore; On-site; SGD 120,000 - 160,000; Full time

Job summary

Bitdeer Technologies Group in Singapore is seeking a Design Verification Lead to drive the verification strategy and execution for complex IC designs. You will lead a team of verification engineers to ensure robust functional coverage and high-quality silicon through advanced verification methodologies, automation, and close collaboration with design and architecture teams.

You will develop verification environments, testbenches, and test sequences, drive test patterns, run simulations, and

Qualifications

• 10+ years of IC/SoC functional verification experience.
• Strong debugging skills with RTL simulation and waveform analysis.
• Proficient in UVM, SystemVerilog, Verilog and SVA.
• Knowledge of AXI, NoC and RISC-V protocols.
• Proven ability to lead verification and mentor engineers.

Responsibilities

• Lead the verification strategy and execution for DUT blocks with full functional coverage.
• Mentor and guide the verification team in test plans aligned with design specs.
• Develop and maintain verification environments, testbenches and sequences.
• Create test patterns and stimulus to exercise corner cases and features.
• Run simulations, analyze results, and debug RTL with design teams.
• Manage regression testing and ensure stability through updates.
• Track coverage metrics and sign-off readiness with documentation.
• Develop automation scripts and VIPs to improve throughput.
• Collaborate cross-functionally with design, architecture and physical teams.

Skills

IC/SoC verification

RTL debugging

UVM/SystemVerilog

Verilog/SVA

AXI/NoC/RISC-V

Leadership / mentoring

Education

Bachelor’s degree or above in Microelectronics / Electrical Engineering

Job description

Bitdeer Technologies Group in Singapore is seeking a Design Verification Lead to drive the verification strategy and execution for complex IC designs. You will lead a team of verification engineers to ensure robust functional coverage and high-quality silicon through advanced verification methodologies, automation, and close collaboration with design and architecture teams.

You will develop verification environments, testbenches, and test sequences, drive test patterns, run simulations, and