Design Verification Engineer

BITDEER DEVELOPMENT PTE. LTD.; Singapore; On-site; SGD 70,000 - 110,000; Full time

Benefits offered by this job

Welfare benefits

Training and mentoring

Job summary

Bitdeer Technologies Group in Singapore seeks a verification engineer to implement UVM-based verification, SystemVerilog/Verilog, and SVA across RTL designs. You will develop test plans, create stimuli, execute simulations, and debug complex RTL issues.

Join a high-impact team leveraging Palladium Z1, HAPS and Zebu platforms, with strong emphasis on coverage, regression, and sign-off readiness in a fast-growing crypto-asset environment.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or related field.
• Solid understanding of digital logic design and RTL development using Verilog or similar HDLs.
• Proficiency with AMBA bus protocols (AXI, AHB, APB).
• Hands-on experience with RTL simulation, debugging, and waveform analysis using EDA tools.
• Proficiency with SystemVerilog and UVM verification methodologies.
• Familiarity with Linux/Unix environments and scripting for automation.
• Experience with version control systems (Git or SVN).
• Strong analytical and debugging skills, clear verification reporting.

Responsibilities

• Apply UVM, SystemVerilog, Verilog and SVA for verification tasks.
• Develop and implement verification methodologies including UVM, C/C++, co-simulation and emulation.
• Contribute to projects using Palladium Z1, HAPS and Zebu platforms.
• Collaborate with verification and design teams to define and refine test plans.
• Create test cases, stimuli and patterns to validate DUT and corner cases.
• Execute simulations and debug RTL issues using waveform analysis.
• Maintain regression test suites and improve coverage metrics.
• Document verification results and contribute to verification sign-off.

Skills

UVM

SystemVerilog

Verilog

C/C++ programming

RTL design understanding

Linux scripting (Python)

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science

Tools

Palladium Z1

HAPS

Zebu platforms

Synopsys

Cadence

Siemens EDA / Mentor

Git

Job description

About Bitdeer:

Bitdeer Technologies Group (Nasdaq: BTDR) is a world-leading technology company for Bitcoin mining. Bitdeer is committed to providing comprehensive computing solutions for its customers. The Company handles complex processes involved in computing such as equipment procurement, transport logistics, datacenter design and construction, equipment management, and daily operations. The Company also offers advanced cloud capabilities to customers with high demand for artificial intelligence. Headquartered in Singapore, Bitdeer has deployed datacenters in the United States, Norway, and Bhutan.

What you will be responsible for:

• Apply UVM (Universal Verification Methodology), SystemVerilog, Verilog, and SVA (SystemVerilog Assertions) languages in verification tasks
• Develop and implement state-of-the-art verification methodologies, including UVM, C/C++, co-simulation, system emulation, and mixed-mode simulation/emulation
• Contribute to projects requiring advanced verification tools such as Palladium Z1, HAPS, and Zebu platforms
• Collaborate effectively within a team, ensuring high-quality deliverables
• Equipped with a strong understanding of the Design Under Test (DUT), including its architecture, interfaces, and functional requirements.
• Collaborate with verification and design engineers to define, review, and refine verification test plans based on design specifications.
• Implement test cases, stimulus, and test patterns to validate DUT functionality and corner cases.
• Execute simulations and analyze/debug RTL issues using waveform analysis and debugging tools.
• Run and maintain regression test suites to validate design changes and ensure design stability across development cycles.
• Monitor and improve functional and code coverage metrics, contributing to coverage-driven verification and verification closure.
• Document test cases, verification results, and coverage reports to support verification sign-off.
• Contribute to the development and maintenance of automation scripts, reusable verification components, and Verification IP (VIP) to enhance team productivity.

How you will stand out:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or currently pursuing the degree for entry-level roles).
• Solid understanding of digital logic design and RTL development using Verilog or other Hardware Description Languages (HDL).
• Proficiency with AMBA bus protocols (AXI, AHB, APB).
• Hands‑on experience with RTL simulation, debugging, and waveform analysis using industry‑standard EDA tools (e.g., Synopsys, Cadence, or Siemens EDA / Mentor).
• Proficiency with SystemVerilog and modern verification methodologies such as UVM.
• Familiarity with Linux/Unix environments and scripting for automation (e.g., Bash, C Shell, Perl, or Python).
• Experience using version control systems such as Git or SVN in a collaborative development environment.
• Good analytical and debugging skills, with the ability to identify and resolve RTL and functional issues.
• Strong communication skills in English, both written and verbal, with the ability to document verification results clearly.
• Self‑motivated, detail‑oriented, and able to work effectively both independently and within a team environment.
• Experience with SystemVerilog and modern verification methodologies such as UVM.
• Experience with one or more of these technologies: NoC (network on chip), PCIe (Gen-4 onwards), DRAM memory controller.
• Experience with using AI Agent for verification productivity.
• Familiarity with RISC-V processor architecture or CPU verification concepts.
• Experience with C/C++ programming for testbench development or verification utilities.
• Exposure to coverage-driven verification and regression automation workflows.

What you will experience working with us:

• A culture that values authenticity and diversity of thoughts and backgrounds;
• An inclusive and respectable environment with open workspaces and exciting start-up spirit;
• Fast-growing company with the chance to network with industrial pioneers and enthusiasts;
• Ability to contribute directly and make an impact on the future of the digital asset industry;
• Involvement in new projects, developing processes/systems;
• Personal accountability, autonomy, fast growth, and learning opportunities;
• Attractive welfare benefits and developmental opportunities such as training and mentoring.

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Bitdeer is committed to providing equal employment opportunities in accordance with country, state, and local laws. Bitdeer does not discriminate against employees or applicants based on conditions such as race, colour, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union.