Senior Design Verification Engineer: IP & Silicon

BITDEER DEVELOPMENT PTE. LTD.; Singapore; On-site; SGD 80,000 - 140,000; Full time

Job summary

Bitdeer Development Pte. Ltd. is seeking a Design Verification Engineer to join our IC development team. You will help ensure functional correctness and performance of computer arithmetic IPs, develop verification environments, and contribute to high-quality IP and silicon through systematic verification.

Join a global, fast-growing tech group with exposure to Palladium, HAPS, and Zebu platforms. Strong collaboration and end-to-end verification experience are expected for this role.

Qualifications

• Solid understanding of digital logic design and RTL development.
• Experience with verification methodologies, including UVM.
• Familiarity with Linux/Unix, scripting and version control.

Responsibilities

• Develop and maintain verification environments and testbenches.
• Bring up formal verification testbenches and run proofs.
• Collaborate to define verification plans based on specs.
• Run simulations and analyze RTL issues with waveform tools.
• Improve coverage and automate verification workflows.
• Document results and support sign-off.

Skills

SystemVerilog

UVM

Verilog

C/C++

RTL verification

IP verification

Python

Education

Bachelor's or Master's in Electrical Engineering / Computer Engineering / Computer Science

Tools

Synopsys

Cadence

Siemens EDA

Palladium

HAPS

Zebu

Job description

Bitdeer Development Pte. Ltd. is seeking a Design Verification Engineer to join our IC development team. You will help ensure functional correctness and performance of computer arithmetic IPs, develop verification environments, and contribute to high-quality IP and silicon through systematic verification.

Join a global, fast-growing tech group with exposure to Palladium, HAPS, and Zebu platforms. Strong collaboration and end-to-end verification experience are expected for this role.