IC Physical Design Engineer: RTL to GDS, Tapeout Lead

PERSOL; Singapore; Presencial; SGD 120.000 - 180.000; Jornada completa

Descripción de la vacante

PERSOL in Singapore seeks an experienced IC design engineer to own blocks from RTL to GDS, focusing on 12nm/6nm/4nm processes. You will manage 2–3 million instances and oversee Synthesis/APR and Signoff, ensuring timing and reliability.

As a block coordinator for 5–10 blocks, you will drive issue resolution and provide solutions to block owners. You will also take a TOP role for hierarchical chip tapeout, handling floorplanning and partitioning for full-chip delivery.

Formación

• Basic knowledge of electronic design or IC design.
• Familiarity with UNIX/LINUX environment.
• Exposure to one of C/C++, Python, TCL, or Perl.
• Good communication and teamwork; eager to learn and take on challenges.

Responsabilidades

• Own block of 2–3 million instances, work on Synthesis/APR/Signoff.
• Coordinate blocks as a block owner for 5–10 blocks, solve critical issues and provide solutions.

Conocimientos

UNIX/Linux

C/C++

Python

TCL

Perl

IC design basics

Educación

IC design internship

Herramientas

Synthesis/APR

Signoff

Descripción del empleo

PERSOL in Singapore seeks an experienced IC design engineer to own blocks from RTL to GDS, focusing on 12nm/6nm/4nm processes. You will manage 2–3 million instances and oversee Synthesis/APR and Signoff, ensuring timing and reliability.

As a block coordinator for 5–10 blocks, you will drive issue resolution and provide solutions to block owners. You will also take a TOP role for hierarchical chip tapeout, handling floorplanning and partitioning for full-chip delivery.