Lead IC Physical Design Manager – Tapeout & SoC PD

PERSOL Singapore; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

PERSOL Singapore is seeking a senior IC physical design lead to drive tapeout-critical initiatives from RTL to GDS. You will coordinate synthesis, APR, and PV tasks across multiple blocks and own the TOP-level floorplanning and assembly for large hierarchical chips.

The role requires 8+ years in IC design, strong UNIX/Linux skills, and proficiency in at least one programming language such as C/C++, Python, TCL, or Perl.

Qualifications

• 8+ years of experience in IC design and tapeout.
• Strong UNIX/Linux knowledge.
• Proficient in at least one language: C/C++, Python, TCL, or Perl.
• Excellent communication and teamwork to coordinate with multiple teams.

Responsibilities

• Block coordination for Synthesis/APR/PV tasks (10+ blocks) and lead issue resolution.
• TOP-level role for hierarchical chip (20M+ instances, 1000+ macros) including floorplanning and assembly.
• PD project management coordinating with Frontend and Signoff teams to ensure on-time SoC tapeout.

Skills

IC design

Leadership

UNIX/Linux

C/C++

Python

TCL

Perl

Job description

PERSOL Singapore is seeking a senior IC physical design lead to drive tapeout-critical initiatives from RTL to GDS. You will coordinate synthesis, APR, and PV tasks across multiple blocks and own the TOP-level floorplanning and assembly for large hierarchical chips.

The role requires 8+ years in IC design, strong UNIX/Linux skills, and proficiency in at least one programming language such as C/C++, Python, TCL, or Perl.