IC Physical Design Engineer

PERSOL; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

PERSOL in Singapore seeks an experienced IC design engineer to own blocks from RTL to GDS, focusing on 12nm/6nm/4nm processes. You will manage 2–3 million instances and oversee Synthesis/APR and Signoff, ensuring timing and reliability.

As a block coordinator for 5–10 blocks, you will drive issue resolution and provide solutions to block owners. You will also take a TOP role for hierarchical chip tapeout, handling floorplanning and partitioning for full-chip delivery.

Qualifications

• Basic knowledge of electronic design or IC design.
• Familiarity with UNIX/LINUX environment.
• Exposure to one of C/C++, Python, TCL, or Perl.
• Good communication and teamwork; eager to learn and take on challenges.

Responsibilities

• Own block of 2–3 million instances, work on Synthesis/APR/Signoff.
• Coordinate blocks as a block owner for 5–10 blocks, solve critical issues and provide solutions.

Skills

UNIX/Linux

C/C++

Python

TCL

Perl

IC design basics

Education

IC design internship

Tools

Synthesis/APR

Signoff

Job description

Job Description

• IC physical design of 12nm/6nm/4nm and below world leading advanced process chip, from RTL to GDS.
• Block owner, take block of 2~3 million instances, working on Synthesis/APR (auto place and route)/Signoff.
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout.

Job Requirements

• Basic knowledge of electronic design or IC design, internship experience in related area is preferred.
• Basic knowledge of UNIX/LINUX env and capable of at least one of the following programming languages: C/C++, Python, TCL, Perl.
• Good communication and teamwork spirit, eager to learn new technologies and willing to take challenges.