IC Logic Design Engineer (STA)

FLAMINGO RECRUITMENT PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Flamingo Recruitment Pte. Ltd. in Singapore is seeking an experienced IC Design engineer focused on timing analysis and sign-off. You will collaborate with front-end and back-end teams to develop timing constraints and drive timely timing closure across full-chip flows.

The ideal candidate has 8+ years in IC design, strong SDC knowledge, and hands-on experience with Design Compiler, Formality, and PrimeTime, plus solid Tcl scripting skills.

Qualifications

• Bachelor's degree or above in Computer/Electrical/Electronic/Communications Engineering or related field.
• 8+ years of relevant IC design industry experience.
• Strong knowledge of SDC and hands-on experience with DC, Formality, and PrimeTime.
• Solid Tcl scripting skills.
• Strong understanding of logic synthesis, STA, timing constraints, and timing closure.

Responsibilities

• Perform logic synthesis, LEC, ECO implementation, and quality control in the IC development process.
• Collaborate with front-end design teams to develop/refine timing constraints and drive timing closure.
• Execute full-chip Static Timing Analysis (STA) and ensure quality/accuracy of timing constraints.
• Work with back-end design teams to complete timing analysis and sign-off.

Skills

Tcl scripting

Timing closure

Education

Bachelor's degree in Electrical/Electronic Engineering or related field

Tools

Design Compiler (DC)

Formality

PrimeTime (PT)

Job description

Base: Center of Singapore

Key Responsibilities

• Perform logic synthesis, LEC, ECO implementation, and quality control throughout the IC development process.
• Work closely with front-end design teams to develop and refine timing constraints and drive timely timing closure.
• Execute full-chip Static Timing Analysis (STA) and ensure the quality and accuracy of timing constraints.
• Collaborate with back-end design teams to complete timing analysis and sign-off.

Requirements

• Bachelor's degree or above in Computer Engineering, Electrical/Electronic Engineering, Communications Engineering, or a related field.
• 8+ years of relevant IC design industry experience.
• Strong knowledge of SDC and hands-on experience with Design Compiler (DC), Formality, and PrimeTime (PT) .
• Solid Tcl scripting skills.
• Strong understanding of logic synthesis, STA, timing constraints, and timing closure.

EA License: R1987104