First-Silicon Test Architect for NPI

Broadcom Inc.; Singapore; On-site; SGD 120,000 - 160,000; Full time

Job summary

Broadcom Inc. is seeking a Test Development Engineer to lead the architecture and execution of ATE test solutions for NPI silicon programs. You will own the First Silicon bridge, translating complex designs into robust, production-ready test programs to accelerate time-to-market.

You will drive test strategy from pre-silicon to mass production, bring-up first-pass silicon, and collaborate with IP, DFT, and test partners to ensure coverage and efficiency across PCIe Gen6, HBM4, and 400G+ SerDes.

Qualifications

• Proven experience developing ATE test programs on Advantest SmartScale (PS1600) or ExaScale (PS5000) platforms.
• Advanced programming skills in C++, Python, and Perl, with the ability to write robust, maintainable test code.
• Deep understanding of silicon physics, ESD, latch-up, and the challenges of testing at advanced nodes (1.4nm/2nm/3nm).
• Strong grasp of high-speed electronics, transmission line theory, power delivery and test hardware design.
• NPI lifecycle: Demonstrated success in navigating milestones—from tape-out to qualification and high-volume transfer.

Responsibilities

• Lead the development of test strategies from pre-silicon to mass production.
• Drive hands-on bring-up of first-pass silicon and debug between ATE platforms and silicon.
• Develop, implement, and validate complex ATE test programs for next-generation chips.
• Collaborate with PCB and probe card designers to optimize test hardware for power and signal integrity at high speed.
• Partner with design teams to ensure DFT features are integrated and test time is reduced.
• Perform rigorous PVT characterization to establish product guard-bands and optimize test coverage.
• Serve as the primary technical contact for IP owners, DFT engineers, and assembly/test partners.

Skills

C++

Python

Java

Tools

Advantest SmartScale PS1600

ExaScale PS5000

Perl

Job description

Broadcom Inc. is seeking a Test Development Engineer to lead the architecture and execution of ATE test solutions for NPI silicon programs. You will own the First Silicon bridge, translating complex designs into robust, production-ready test programs to accelerate time-to-market.

You will drive test strategy from pre-silicon to mass production, bring-up first-pass silicon, and collaborate with IP, DFT, and test partners to ensure coverage and efficiency across PCIe Gen6, HBM4, and 400G+ SerDes.