NPI Silicon Test Architect — First-Silicon Bring-Up Lead

Broadcom

Singapore

On-site

SGD 110,000 - 165,000

Full time

4 days ago
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Job summary

Broadcom in Singapore seeks a Test Development Engineer to lead the definition, architecture, and execution of test solutions for our NPI silicon programs. You will translate complex design specifications into robust, production-ready ATE test programs, unifying characterization, verification, and manufacturing test coverage early in the design cycle.

You will drive test program architecture, bring-up of first silicon, and collaboration with PCB and probe teams to optimize high-speed test

Qualifications

  • Advanced programming skills in C++, Python, and Perl to automate test patterns and data pipelines.
  • Strong understanding of DFT and test instrumentation in high-speed digital environments.
  • Experience with ATE test development for silicon/npi programs or similar environments.

Responsibilities

  • Define test program architecture from pre-silicon to mass production.
  • Drive first-silicon bring-up and debug of ATE to silicon interfaces.
  • Develop and validate ATE test programs for next-generation chips using C++/Python/Java.
  • Collaborate with PCB and probe-card designers to optimize high-speed test hardware.
  • Influence DFT features and testability hooks across design teams.
  • Conduct PVT characterization to set guard-bands and optimize test coverage.
  • Act as technical lead for IP owners, DFT engineers, and assembly/test partners.

Skills

C++
Python
Perl

Tools

Advantest SmartScale (PS1600)
ExaScale (PS5000)

Job description

Broadcom in Singapore seeks a Test Development Engineer to lead the definition, architecture, and execution of test solutions for our NPI silicon programs. You will translate complex design specifications into robust, production-ready ATE test programs, unifying characterization, verification, and manufacturing test coverage early in the design cycle.

You will drive test program architecture, bring-up of first silicon, and collaboration with PCB and probe teams to optimize high-speed test

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