DFT Design Engineer - Test Insertion & ATPG

Realtek Singapore Private Limited; Singapore; On-site; SGD 70,000 - 100,000; Full time

Job summary

Realtek Singapore Private Limited seeks a skilled Design-For-Test (DFT) Engineer to support design-for-test throughout internal RD groups. You will work with IC Design teams to extend specifications, develop DFT structures (At-speed test, MBIST, test compression, boundary scan), and generate ATPG vectors for fault models and IR analysis.

You will perform functional and ATPG pre- and post-layout simulations while enhancing the scripting environment.

Qualifications

• Experience with DFT concepts and ASIC synthesis.
• Proficiency in TCL or Perl scripting for EDA workflows.
• Excellent written and verbal communication.

Responsibilities

• Collaborate with IC Design teams to define test requirements.
• Develop test plans and design-for-test structures (ATPG, MBIST, boundary scan).
• Create or modify scan constraints and generate ATPG vectors.
• Conduct pre- and post-layout simulations for functional and ATPG tests.
• Enhance internal scripting environments based on needs.

Job description

Realtek Singapore Private Limited seeks a skilled Design-For-Test (DFT) Engineer to support design-for-test throughout internal RD groups. You will work with IC Design teams to extend specifications, develop DFT structures (At-speed test, MBIST, test compression, boundary scan), and generate ATPG vectors for fault models and IR analysis.

You will perform functional and ATPG pre- and post-layout simulations while enhancing the scripting environment.