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Job summary
A leading technology company in Singapore seeks a Design Verification Manager to lead a verification team in developing advanced methodologies for SoC design. Key responsibilities include test plan execution and achieving zero defects. Applicants should have strong knowledge of SoC design principles, experience in UVM verification, and at least 10 years of relevant experience. Strong leadership and communication skills are essential, with a plus for experience in video processing.
Qualifications
Strong knowledge of SoC design principles including IP block integration.
Experience with test plan development and execution.
Familiarity with EDA tools for ASIC verification.
Highly disciplined and quality-minded approach.
Excellent communication and team leadership abilities.
Strong expertise in UVM verification methodology.
Experience in video processing is a plus.
Responsibilities
Lead a verification team developing state-of-the-art methodologies.
Conduct thorough test plan reviews and execute on-time.
Aim for zero-defects with smart verification approaches.
Skills
SoC design principles
UVM verification methodology
C programming
Python
team leadership
communication skills
Education
MSEE/BSEE in Electrical Engineering or Computer Engineering
Tools
EDA tools
Job description
A leading technology company in Singapore seeks a Design Verification Manager to lead a verification team in developing advanced methodologies for SoC design. Key responsibilities include test plan execution and achieving zero defects. Applicants should have strong knowledge of SoC design principles, experience in UVM verification, and at least 10 years of relevant experience. Strong leadership and communication skills are essential, with a plus for experience in video processing.