CNT-CMOS Process & Device Integration Fellow

National University of Singapore; Singapore; On-site; SGD 60,000 - 90,000; Full time

Job summary

The National University of Singapore's Department of Electrical and Computer Engineering seeks a Research Fellow to lead wafer-scale CNFET CMOS process development and device fabrication. The role interfaces with industry partners to transfer a documented process to production.

You will qualify CNT array films, characterize devices electrically, and author the process-of-record, including flow sheets and metrology plans, enabling lab-to-fab transfer.

Qualifications

• Job requires leadership in research, fabrication and process development for CNFET CMOS technology.
• Experience with device characterization and integrating lab processes into production lines is expected.

Responsibilities

• Develop and optimise CNFET core process modules (ALD high-k gate stacks, source/drain metallisation, channel cleaning, passivation, threshold control).
• Scale device geometry using electron-beam or DUV lithography on production-compatible lines.
• Qualify CNT array films for device-grade channels (density, alignment, purity) with SEM, AFM, Raman, and optical mapping.
• Electrically and statistically characterize devices (transfer/ output, contact resistance, subthreshold swing, hysteresis, reliability).
• Author the process-of-record (flow sheet, recipes, metrology plan, inline controls) for lab-to-fab transfer.

Job description

The National University of Singapore's Department of Electrical and Computer Engineering seeks a Research Fellow to lead wafer-scale CNFET CMOS process development and device fabrication. The role interfaces with industry partners to transfer a documented process to production.

You will qualify CNT array films, characterize devices electrically, and author the process-of-record, including flow sheets and metrology plans, enabling lab-to-fab transfer.