Carbon Nanotube CMOS Process Development Fellow

NATIONAL UNIVERSITY OF SINGAPORE; Singapore; On-site; SGD 110,000 - 160,000; Full time

Job summary

The National University of Singapore (NUS) invites applications for a Research Fellow to lead CNFET process development and device fabrication on wafer-scale carbon nanotube CMOS. The role involves developing BEOL-compatible processes, scaling via advanced lithography, and transferring a documented process to an industry partner for verification on a 200 mm line.

You will supervise graduate students, publish in leading venues, and contribute to invention disclosures and research proposals, with

Qualifications

• PhD in a relevant engineering or science field (awarded or near completion).
• Hands-on cleanroom experience across multiple deposition and etch processes.
• Proven ability to take a device from mask design to fabrication with electrical data.
• Experience in electrical characterization of nanoscale transistors and data analysis.
• Strong publication record and ability to work independently and mentor others.

Responsibilities

• Lead process development and device fabrication for wafer-scale CNFET work.
• Develop ALD high‑k gate stacks, S/D metallisation, channel cleaning and passivation.
• Scale device geometry using advanced lithography for aggressive pitch.
• Qualify CNFET channel materials via SEM, AFM, Raman and optical mapping.
• Characterise devices electrically and statistically; assess reliability.
• Draft and transfer process-of-record and support lab-to-fab transfer with partners.
• Collaborate on CNFET module integration and IC fabrication with circuit team.
• Publish results and supervise students in the cleanroom.

Skills

Cleanroom operation

Electron-beam lithography

Device fabrication

Electrical device characterization

Scientific publication track

Education

PhD in Electrical Engineering, Materials Science, Applied Physics, Chemical Engineering or related field

Tools

ALD high‑k gate stacks

Reactive ion etching

Physical vapour deposition

Electron-beam lithography

UV/DUV lithography

Wafer-scale integration

Job description

The National University of Singapore (NUS) invites applications for a Research Fellow to lead CNFET process development and device fabrication on wafer-scale carbon nanotube CMOS. The role involves developing BEOL-compatible processes, scaling via advanced lithography, and transferring a documented process to an industry partner for verification on a 200 mm line.

You will supervise graduate students, publish in leading venues, and contribute to invention disclosures and research proposals, with