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MediaTek Research Lab Inc. in Singapore invites applications for an ASIC DV Engineer to join our verification team. You will verify modules/IP/SOC designs, develop test plans, and build robust verification environments to ensure high-quality silicon.
You will work hands-on with UVM, SystemVerilog, Verilog and SystemC on low-power, formal verification and advanced methodologies, with exposure to WiFi, 5G, AR/VR, AI and cloud networking, plus a structured program for professional development.
MediaTek Research Lab Inc. in Singapore invites applications for an ASIC DV Engineer to join our verification team. You will verify modules/IP/SOC designs, develop test plans, and build robust verification environments to ensure high-quality silicon.
You will work hands-on with UVM, SystemVerilog, Verilog and SystemC on low-power, formal verification and advanced methodologies, with exposure to WiFi, 5G, AR/VR, AI and cloud networking, plus a structured program for professional development.