[2027 Campus Hire] Design Verification Engineer

MediaTek Research Lab Inc.; Singapore; On-site; SGD 42,000 - 62,000; Full time

Job summary

MediaTek Research Lab Inc. in Singapore invites applications for an ASIC DV Engineer to join our verification team. You will verify modules/IP/SOC designs, develop test plans, and build robust verification environments to ensure high-quality silicon.

You will work hands-on with UVM, SystemVerilog, Verilog and SystemC on low-power, formal verification and advanced methodologies, with exposure to WiFi, 5G, AR/VR, AI and cloud networking, plus a structured program for professional development.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering or related.
• Dedication to continuous self-developing and learning new technologies.
• Good knowledge of chip design flow and EDA tools.
• Strong coding skills in C/C++, Perl, Python, and Unix/Linux shell.

Responsibilities

• Module/IP/SOC design verification.
• Develop and review test plans.
• Develop verification environment/testbench in Module/IP/SOC level.
• Develop verification IP and reference model.
• Implement test with randomization-based coverage driven verification methodology.
• Implement functional and functional/code coverage closure.
• Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC.
• Low Power verification.
• Formal verification.
• Verification automation flow.

Skills

C/C++

Perl

Python

Unix/Linux shell

EDA tools

Chip design flow

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering or related

Tools

EDA tools

Job description

Category

Chip Design

Location

Singapore

Experience

No Work Expe.

Job Description

• [What you will do]
• Module/IP/SOC design verification.
• Develop and review test plans.
• Develop verification environment/testbench in Module/IP/SOC level.
• Develop verification IP and reference model.
• Implement test with randomization-based coverage driven verification methodology.
• Implement functional and functional/code coverage closure.
• Hands-on code/debug with UVM, SystemVerilog, Verilog and SystemC.
• Low Power verification.
• Formal verification.
• Verification automation flow.#LI-WC1

Main Requirements and Qualifications

• [What you will bring]
• - Bachelor’s degree in Electrical Engineering, Computer Engineering or related
• - Dedication to continuous self-developing and learning new technologies
• - Good knowledge of chip design flow and EDA tools
• - Strong coding skills in C/C++, Perl, Python, and Unix/Linux shell
• [About the team]
• ASIC DV Team focus on developing full and advanced verification methodology IP/SOC. You will have chance to work on challenging projects that attractive and be immersed in leading tech e.g.: WiFi, 5G, AR/VR, AI, Cloud Networking. A comprehensive program for professional development / career growth will be provided to the new joiner and he/she will have chance to learn from the best expert in this area.
• [Why MediaTek?]
• MediaTek Incorporated (TWSE: 2454) is the world’s 5th largest global fabless semiconductor company. Joining MediaTek means becoming part of a team that powers over 2 billion ICs worldwide, enriching and enhancing everyday life. Our chipsets are integral to a wide range of products, from smartphones, mobile devices to home and IoT devices, in entertainment and multimedia products, and provide connectivity and communication solutions that keep people connected with friends and their families with access to online resources. Working at MediaTek offers you the opportunity to contribute to the world through the devices we use in our daily lives – it’s more than just a job, it’s a chance to make a meaningful impact.