An application made for this job — a tailored resume and cover letter that speak straight to the posting.
Get past ATS filters
Job summary
A leading technology company in Singapore seeks an entry-level engineer to handle ASIC verification responsibilities. The role involves creating detailed test plans, developing verification environments, and collaborating with design teams to ensure functional correctness. Ideal candidates should have degrees in Electrical Engineering and familiarity with SystemVerilog, as well as skills in communication and documentation.
Qualifications
Entry-level position suitable for recent graduates.
Strong VLSI functional verification knowledge is required.
Ability to work in a dynamic environment.
Responsibilities
Develop detailed test plans for functional features based on design specs.
Create ASIC verification environment with necessary components.
Simulate tests using EDA tools to check functional specifications.
Collaborate with the digital design team to debug test cases.
Skills
Strong communication skills
Analytical skills
Documentation skills
VLSI functional verification experience
SystemVerilog/UVM experience
Familiarity with ASIC verification methodology
Education
BSEE or MSEE
Tools
EDA tools
High-speed IO (USB-2/3, PCIe gen2/3, SATA)
Job description
A leading technology company in Singapore seeks an entry-level engineer to handle ASIC verification responsibilities. The role involves creating detailed test plans, developing verification environments, and collaborating with design teams to ensure functional correctness. Ideal candidates should have degrees in Electrical Engineering and familiarity with SystemVerilog, as well as skills in communication and documentation.