SOC / IP Verification Engineer -Singapore

ByteDance; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

ByteDance is seeking an experienced verification engineer to join the AI chip team in Singapore. The role focuses on building verification platforms and performing IP/SOC-level verification to ensure high quality, testpoint analysis, and thorough test execution.

The candidate should have a strong background in chip verification, familiarity with EDA tools and UVM methodologies, and be capable of navigating tape-out processes. Prior exposure to AMBA/PCIe buses and SerDes is a plus.

Qualifications

• Bachelor's degree or above in microelectronics, computer science or related majors.
• 3+ years of verification experience, with tape-out experience preferred.
• Familiar with chip development/verification processes, proficient in verification-related EDA tools, and skilled in UVM.

Responsibilities

• Build verification platforms and complete IP / SOC-level verification work, including test point analysis, running testcase, quality check, etc.

Skills

Verification experience

Tape-out experience

Chip development/verification

UVM

Education

Bachelor's degree in microelectronics, computer science or related majors

Tools

UVM

AMBA

PCIE

SerDes

Job description

Responsibilities

Team Introduction

The AI Chip Team focuses on the research and development of artificial intelligence chips, with products spanning both cloud and edge (terminal) applications. The team is dedicated to delivering high-efficiency, cost-effective, and independently controlled AI chips and SoC solutions to support hardware and software R&D, as well as the computing demands of AI and related businesses.

Responsibilities

• Build verification platforms and complete IP / SOC-level verification work, including test point analysis, running testcase, quality check, etc.

Qualifications

Minimum Qualifications

• Bachelor's degree or above in microelectronics, computer science or related majors.
• 3+ years of verification experience, with tape-out experience preferred.
• Familiar with chip development/verification processes, proficient in verification-related EDA tools, and skilled in mainstream verification methodologies such as UVM.

Preferred Qualifications

• Familiar with common buses such as AMBA and PCIE, high-speed interface such as serDes protocol.
• Experience in AI inference/training verification.
• Experience in storage systems such as LPDDR/DRAM.