[2027 Internship] Physical Verification CAD Intern I

MediaTek Research Lab Inc.; Singapore; On-site; SGD 16,000 - 25,000; Full time

Job summary

MediaTek Research Lab Inc. invites motivated students for a 2027 Internship as a Physical Verification CAD Intern I in Singapore. You will work with a focused team on design checks to ensure electrical, logical and manufacturability aspects of IC chips.

The role offers mentoring from experienced engineers and hands-on exposure to in-house rule coding and scripting automation. Ideal candidates are pursuing Electrical/Electronics/Computer Science Engineering, are independent, and possess strong

Qualifications

• Pursuing a degree in Electrical/Electronics/Computer Science Engineering.
• Must be independent and eager to learn.
• Able to communicate well and collaborate across teams.
• Willing to explore new problems and find innovative solutions.

Responsibilities

• Learn design rule check coding and apply to chip designs.
• Execute design rule checks on chip designs and regressions.
• Study regression structures for in-house design rules.
• Debug existing rule code versus regression structures.
• Learn in-house design checks definition methodology.
• Perform basic scripting automation tasks.

Skills

Independent worker

Strong drive to learn

Communication skills

Cross-team collaboration

Education

Electrical/Electronics/Computer Science Engineering

Tools

IC layout experience

Scripting knowledge

Job description

2027 Internship Physical Verification CAD Intern I

Category: Chip Design

Location: Singapore

Experience: No Work Expe.

Job Description

MediaTek is a young and innovative company, always looking to create effective solutions to existing problems We seek like minded individuals to join us as interns, individuals with the spark to innovate, the motivation to learn and to perform and deliver as a team orindividual.Our team is focused and specialized in design checks to ensure electrical, logical and manufacturability of an IC chip, one of the most important backend signoff milestones for any chip design. We are seeking interns who will be part of a bigger team, working on in house design rule definition/coding for advanced and matured technology nodes, as well as scripting automation for design checks. What’s in it for you? When you join us, you’ll work alongside with experienced engineers who’ll mentor and guide you. You will be involved in: Learn design rule check coding Execute design rule checks on chip design and regression structures Study test regression structures for in house design rule Debug existing rule code versus regression structures Learn In house design checks definition methodology Basic scripting automation#LI-WC1

Main Requirements and Qualifications

• What you bring
• Pursuing a degree in Electrical/Electronics/Computer Science Engineering
• Must be an independent worker and have a strong drive to learn and pick up new things
• Able to communicate well and handle cross team collaboration
• Be willing to explore unfamiliar territory and try to seek innovative solutions to existing or new problems
• Able to demonstrate critical thinking when faced with difficult situations
• Having IC layout experience and scripting knowledge is a plus but not a necessary skill