ASIC Verification Engineer - Sweden

Arion Recruitment Ltd; Stockholms kommun; On-site; SEK 488,069 - 759,219; Full time

Job summary

Arion Recruitment Ltd is seeking a skilled SoC Level Verifier for ASIC/FPGA in Stockholms län, Sweden. This role involves validating multi-chip ASICs using software-driven tests in C, debugging failures in various platforms, and integrating sequences for UVM VIPs. Successful candidates will have strong C programming skills and familiarity with debugging tools such as SystemC/TLM or RTL simulation. Join a dynamic team working on innovative high-performance systems.

Qualifications

• Strong experience in C programming and software-driven testing.
• Familiarity with SystemC/TLM, RTL simulation, or hardware emulation for debugging.
• Experience with UVM and UVM VIPs is a plus.

Responsibilities

• Develop and implement software-driven tests in C to validate SoC functionality.
• Debug failing test cases using SystemC/TLM, RTL simulation, or hardware emulation.
• Integrate and develop sequences for UVM VIPs.
• Contribute to maintaining test cleanliness and stability in CI regression systems.

Skills

C programming

Software-driven testing

SystemC/TLM

RTL simulation

UVM

Debugging

Job description

Job Title: SoC Level Verifier – ASIC/FPGA

We are looking for a skilled contingent worker to join our team in the top-level verification of cutting-edge multi-chip ASICs that power high-performance systems. These designs feature hundreds of processor cores, DSPs, ARM cores, and high-speed interfaces, including Ethernet, CPRI, and PCIe.

Key Responsibilities:

• Develop and implement software-driven tests in C to validate SoC functionality.
• Debug failing test cases using SystemC/TLM, RTL simulation, or hardware emulation, depending on the failure and platform.
• Integrate and develop sequences for UVM VIPs (Verification IPs), required for some tests.
• Contribute to maintaining test cleanliness and stability in CI regression systems running across multiple platforms.
• Potential involvement in design compilation and partitioning for hardware emulators, based on need and interest.

Required Skills:

• Strong experience in C programming and software-driven testing.
• Familiarity with SystemC/TLM, RTL simulation, or hardware emulation for debugging.
• Experience with UVM and UVM VIPs is a plus, but not required for all tests.
• Ability to work in a fast-paced, multi-platform environment, contributing to the quality of the overall verification process.

This role offers an exciting opportunity to work on innovative, high-performance ASIC designs and be part of a dynamic verification team.