Senior ASIC Verification Engineer: SystemVerilog/UVM Lead

Swedium Global Services AB; Solna kommun; On-site; SEK 502,200 - 725,400; Full time

Job summary

Swedium Global Services AB is looking for a Senior ASIC Verification Engineer with 6-8 years of experience to join our team in Solna, Sweden. The ideal candidate will excel in SystemVerilog/UVM and possess strong debugging skills for complex designs. Responsibilities include verification planning and driving project closure.

Candidates should have good communication skills in English and the ability to work both independently and as part of a team. Experience with Matlab and agile methodologies is a plus. Please share your CV to [e-mail].

Qualifications

• Minimum 6-8 years' experience in ASIC verification.
• Excellent debugging skills with complex designs.
• Must understand the entire verification project lifecycle.

Skills

SystemVerilog/UVM

Debugging complex designs

Programming skills

Verification planning

Good communication skills

Tools

Matlab

Jasper

C-programming

Job description

Swedium Global Services AB is looking for a Senior ASIC Verification Engineer with 6-8 years of experience to join our team in Solna, Sweden. The ideal candidate will excel in SystemVerilog/UVM and possess strong debugging skills for complex designs. Responsibilities include verification planning and driving project closure.

Candidates should have good communication skills in English and the ability to work both independently and as part of a team. Experience with Matlab and agile methodologies is a plus. Please share your CV to [e-mail].