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Capgemini Engineering in Porto seeks Design Verification Engineers to join our Semiconductor team and contribute to verification of complex digital IPs and SoCs on advanced semiconductor projects.
You will own verification in prototype and SoC environments, establish benchmarks, and lead DV methodology across platforms. Strong SystemVerilog, UVM/OVM, and UVC component experience are required. Hybrid work and international collaboration are key benefits.
At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the world’s most innovative companies unleash their potential. From autonomous cars to life‑saving robots, our digital and software technology experts think outside the box as they provide unique R&D and engineering services across all industries. Join us for a career full of opportunities. Where you can make a difference. Where no two days are the same.
We are looking for Design Verification Engineers to join our Semiconductor team and contribute to the verification of complex digital IPs and SoCs across advanced semiconductor projects.
Capgemini is the business transformation partner for enterprises in the age of AI. We help organizations imagine and build an intelligent, sustainable future, combining AI, technology and human ingenuity to transform how they operate, innovate and grow. With unique end‑to‑end capabilities spanning strategy, technology, engineering and intelligent operations, we bring together deep industry expertise and market‑leading capabilities in AI, cloud and data to turn ambition into measurable business outcomes at scale. Supported by a robust ecosystem of partners and nearly 60 years of expertise, Capgemini is a responsible and diverse global organization of over 410,000 team members in more than 50 countries.