Senior RTL & SoC Designer - Hybrid, Digital Design Lead

Capgemini Engineering; Kraków; Hybrid; PLN 180,000 - 280,000; Full time

Job summary

Capgemini Engineering is seeking a Digital Design expert to join the semiconductor-focused team. You will lead functional specs and develop microarchitecture for high‑performance digital blocks.

You will perform RTL debugging, linting and CDC checks, collaborating with verification, physical design and architecture teams. Bonus: front-end synthesis and SoC integration experience is a plus.

Qualifications

• 7+ years of hands-on experience in digital design.
• Strong knowledge of Verilog and/or VHDL.
• Familiarity with SystemVerilog is a plus.
• Experience with tools like Cadence Genus, Synopsys Design Compiler (DC), or Fusion Compiler is a plus.
• Proven experience in RTL design, uArch development, and functional specs.
• Deep understanding of linting tools, CDC methodologies, and debugging flows.
• Familiarity with synthesis tools and SoC design is a strong plus.
• Bachelor's degree in EE, ECE, CE, CS, or a related field required; MS or PhD highly desired.
• Excellent communication and collaboration skills.

Responsibilities

• Lead Functional Specification Development for advanced digital systems.
• Design and implement Microarchitecture (uArch) for high-performance blocks.
• Perform RTL Debugging, ensuring design correctness and efficiency.
• Run and analyze Lint Checks and CDC (Clock Domain Crossing) Checks.
• Collaborate with verification, physical design, and architecture teams.
• Bonus: Contribute to Front-End Synthesis and optimization.
• Nice to have: Experience working on SoC-level integration and design.
• Nice to have: Apply Power Optimization Techniques for energy-efficient designs.

Skills

Verilog

VHDL

SystemVerilog

RTL design

Microarchitecture (uArch)

Linting/CDC

SoC design knowledge

Communication

Collaboration

Education

Bachelor's degree in EE, ECE, CE, CS

MS or PhD preferred

Tools

Cadence Genus

Synopsys Design Compiler (DC)

Fusion Compiler

Job description

Capgemini Engineering is seeking a Digital Design expert to join the semiconductor-focused team. You will lead functional specs and develop microarchitecture for high‑performance digital blocks.

You will perform RTL debugging, linting and CDC checks, collaborating with verification, physical design and architecture teams. Bonus: front-end synthesis and SoC integration experience is a plus.