Senior SoC Verification Engineer – Design, Verify & Validate

Lattice; Manila; On-site; PHP 1,500,000 - 2,000,000; Full time

Benefits offered by this job

Comprehensive compensation and benefits

Continuous learning and development opportunities

Job summary

Lattice, located in Manila, is looking for a Senior Design Verification Engineer to join their team. The role involves developing verification plans, verifying design blocks and collaborating with design engineers to ensure high-quality SoC verification.

Candidates should have 6-10 years of relevant experience and a degree in Computer Science or an equivalent field. The position offers exciting challenges in a fast-paced environment dedicated to innovation.

Qualifications

• 6-10 years of experience in digital design verification.
• Experience in ASIC, FPGA, and SoC verification cycles.
• Hands-on with UVM and System Verilog.
• Ability to develop and analyze complex digital design.

Responsibilities

• Develop and execute comprehensive verification plans.
• Verify design blocks and full chip using various tests.
• Collaborate with engineers to ensure high-quality verification.
• Define and design verification regression environments.

Skills

Digital Design Verification Experience

Debugging Skills

HDL and HVL Languages

Simulation Tools Usage

Python Scripting

Communication Skills

Education

Bachelor or Master's Degree in Computer Science, Computer Engineering, Electronics, or Electrical Engineering

Tools

Cadence IES/XCELIUM

Synopsys VCS

Mentor's Questa

Job description

Lattice, located in Manila, is looking for a Senior Design Verification Engineer to join their team. The role involves developing verification plans, verifying design blocks and collaborating with design engineers to ensure high-quality SoC verification.

Candidates should have 6-10 years of relevant experience and a degree in Computer Science or an equivalent field. The position offers exciting challenges in a fast-paced environment dedicated to innovation.