Modeling Design Engineer - IP & Verification

Lattice Semiconductor

Manila

On-site

PHP 1,200,000 - 1,800,000

Full time

14 days+

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Job summary

Lattice Semiconductor in the Philippines is seeking a Senior Design Engineer – Modeling to develop, validate, and deliver IP behavioral models and related hardware collateral for internal engineering teams and customers.

You will translate IP specifications into accurate models, drive validation, automation, and improvements, and collaborate with IP Design, Verification, Integration, Software, and Applications teams across projects.

Qualifications

  • Bachelor’s or Master’s degree in Electrical/Electronics/Computer Engineering or related field.
  • Senior-level experience in digital, custom, analog, FPGA, ASIC, or IP modeling and verification environments.
  • Strong understanding of digital design fundamentals, RTL concepts, simulation, and the design/verification flow.
  • Proficiency in Verilog and/or SystemVerilog for functional or behavioural modeling and simulation.

Responsibilities

  • Develop and maintain IP functional and behavioural models using Verilog, SystemVerilog, and SystemC/C++ where applicable.
  • Translate IP specifications, schematics, RTL, and design intent into model requirements and verification objectives.
  • Perform functional testing, audits, lint and CDC checks, regression testing, and consistency checks against hardware references.
  • Lead or support generation, audit, validation, and release of timing, power, and metadata deliverables for integration.
  • Investigate and resolve model behavior and hardware-software integration issues across the IP lifecycle.
  • Develop scripts and reusable workflows to improve model generation, validation, audit, and reporting.

Skills

Verilog
SystemVerilog
Python
Perl
TCL
Shell
SystemC
C++

Education

Electrical/Electronics/Computer Engineering degree

Tools

SystemC
C++
SPICE

Job description

Lattice Semiconductor in the Philippines is seeking a Senior Design Engineer – Modeling to develop, validate, and deliver IP behavioral models and related hardware collateral for internal engineering teams and customers.

You will translate IP specifications into accurate models, drive validation, automation, and improvements, and collaborate with IP Design, Verification, Integration, Software, and Applications teams across projects.

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