RTL Design Engineer

Amoria Bond

Eindhoven

On-site

EUR 70,000 - 100,000

Full time

7 days ago
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Job summary

Amoria Bond seeks an experienced RTL Design Engineer to join its hardware IP team shaping AI silicon for wearable and embedded devices. You will collaborate across architecture, verification, AI, compiler, and software groups to deliver robust RTL solutions.

Key responsibilities include defining micro-architectures, optimizing designs, and supporting verification closure through regression and coverage analysis.

Qualifications

  • MSc in Electrical Engineering, Computer Engineering, or similar.
  • 5+ years of experience in RTL design and/or verification.
  • Strong experience with modern RTL design methodologies.
  • Experience with DfX, MBIST, ECC, testability, and debug infrastructure.
  • Programming/scripting skills in C, C++, Python.
  • Fluent English.

Responsibilities

  • Define micro-architecture and develop RTL using Verilog/SystemVerilog/VHDL.
  • Perform synthesis and optimize designs for power, performance, and area.
  • Debug designs together with verification engineers.
  • Maintain flows for regression testing, linting, synthesis, and power analysis.
  • Analyze coverage and support verification closure.
  • Contribute to technical documentation and design processes.

Skills

RTL design
Verification
Problem solving
Fluent English

Education

MSc in Electrical/Computer Engineering

Tools

Verilog
SystemVerilog
VHDL

Job description

We are looking for an experienced RTL Design Engineer to join an innovative hardware IP team developing advanced AI silicon for next-generation wearable and embedded devices.

You will work in a highly skilled international R&D environment, collaborating closely with architecture, verification, AI, compiler, and software teams.

What you’ll do
  • Define micro-architecture and develop RTL using Verilog/SystemVerilog/VHDL.
  • Perform synthesis and optimize designs for power, performance, and area.
  • Debug designs together with verification engineers.
  • Maintain flows for regression testing, linting, synthesis, and power analysis.
  • Analyze coverage and support verification closure.
  • Contribute to technical documentation and design processes.
What we’re looking for
  • MSc in Electrical Engineering, Computer Engineering, or similar.
  • 5+ years of experience in RTL design and/or verification.
  • Strong experience with modern RTL design methodologies.
  • Experience with DfX, MBIST, ECC, testability, and debug infrastructure.
  • Programming/scripting skills in C, C++, Python, or similar.
  • Strong problem-solving skills and fluent English.
Nice to have

Experience with CPUs, GPUs or NPUs, computer vision or image processing, machine learning, neuromorphic computing, physical silicon design considerations, coverage analysis, and Git.

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