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Amoria Bond seeks an experienced RTL Design Engineer to join its hardware IP team shaping AI silicon for wearable and embedded devices. You will collaborate across architecture, verification, AI, compiler, and software groups to deliver robust RTL solutions.
Key responsibilities include defining micro-architectures, optimizing designs, and supporting verification closure through regression and coverage analysis.
We are looking for an experienced RTL Design Engineer to join an innovative hardware IP team developing advanced AI silicon for next-generation wearable and embedded devices.
You will work in a highly skilled international R&D environment, collaborating closely with architecture, verification, AI, compiler, and software teams.
Experience with CPUs, GPUs or NPUs, computer vision or image processing, machine learning, neuromorphic computing, physical silicon design considerations, coverage analysis, and Git.