FPGA Design Engineer

Qblox; Delft; On-site; EUR 70,000 - 95,000; Full time

Job summary

Qblox in Delft develops cutting-edge quantum computing hardware and software stacks. We seek an experienced FPGA/RTL Design Engineer to design, verify, and optimize VHDL-based control systems for multi-qubit platforms, collaborating across electrical and software teams.

You will evaluate requirements, read vendor docs, and create robust testbenches while exploring architecture improvements and new FPGA/ASIC approaches to push performance and synchronization at nanosecond scales.

Qualifications

• 5+ years FPGA design in an R&D environment.
• Proficient reading of internal and vendor documentation.
• Strong VHDL knowledge and module-level verification experience.
• Experience with Xilinx Vivado or Intel Quartus.
• Knowledge of AMBA AXI and Avalon buses.
• Experience writing self-checking testbenches and UVM.
• Scripting skills in Python, Tcl/Tk, or shell.
• Git version control and collaboration in cross-functional teams.

Responsibilities

• Understand requirements, design solutions, and implement them in VHDL.
• Review internal and vendor documentation for FPGA/ASICs.
• Write self-checking module-level testbenches and contribute to top-level UVM testbenches.
• Propose architectural and process improvements within the team.
• Collaborate with a diverse, cross-functional FPGA and embedded software team.
• Proactively suggest new developments in the FPGA/ASIC field.

Skills

FPGA design

RTL design

VHDL

SystemVerilog

AMBA AXI

Avalon bus

Testbenches

UVM

Python scripting

Git

Communication

Tools

Xilinx Vivado

Intel Quartus

QuestaSim

Job description

Join us at Qblox as we revolutionize the landscape of quantum computing! Our technology is used around the globe by world-class research teams.

We are seeking passionate FPGA/RTL Design Engineers to help us build a cutting-edge control stack for industrial scale quantum computers.

The stack Qblox develops is a distributed architecture that allows parallel qubit readout, control, intercommunication and other functions, ultimately interacting with the physical qubits using high frequency analog signals. Imagine what it takes to talk to 1000 qubits, with nanosecond-level synchronization and all-to-all connectivity and will understand the design and verification challenges that we face.

We foster a culture of collaboration where every voice is heard and valued. You will have the opportunity to take ownership of your projects, influence technical decisions at higher levels and gain a broad understanding of what goes into our products. You will likely be working in cross-functional teams including electrical engineers, digital design engineers, application engineers and scientists and also have a chance to learn about the Quantum field from our in-house experts.

Your role:

• Understand/evaluate requirements, help design solutions and implement them in VHDL
• Comfortable reading internal and vendor (FPGA, third party ASICs/software) documentation
• Write self-checking testbenches at the module level and occasionally help expand toplevel UVM testbenches
• You will have the opportunity to propose changes to architecture and team processes
• Be a sparring partner to a diverse team of FPGA and embedded software engineers
• We’re constantly trying to find better ways of doing things - be pro-active with proposing your ideas or relevant new developments from the ASIC/FPGA field

Enough about us, what about you?

To really enjoy this role, we imagine that you will possess the following experience:

• A driven FPGA Design engineer that has been working in a similar role and R&D environment for 5+ years.
• Good communication
• Working knowledge of either Xilinx Vivado or Intel FPGA Quartus
• VHDL
• Module-level verification
• High-end simulator tools (e.g. Mentor Graphics QuestaSim)
• Processor and bus-system architecture (e.g. AMBA AXI, Avalon, etc)
• Some scripting ability (python, tcl/tk, shell)
• Git

Optional nice-to-haves:

• Xilinx Zynq-7000 / Ultrascale+/ RFSoC
• (System)Verilog
• Verification frameworks (preferably UVM, but also OVM, OSVVM, Cocotb, etc)
• Timing closure methods
• Linux kernel module development
• DSP
• C/C++
• Microarchitecture design
• Experience in the Quantum field