ASIC Verification Engineer

European Tech Recruit; Amsterdam; On-site; EUR 70,000 - 90,000; Full time

Job summary

A leading tech recruitment agency is seeking a talented ASIC Verification Engineer for an exciting security semiconductor start-up in Amsterdam. You will be responsible for verifying complex SoC architectures and ensuring compliance with functional and performance standards. The ideal candidate has 3+ years in ASIC verification, a solid understanding of digital logic design, and proficiency in verification methodologies like UVM. This role offers an opportunity to make a significant impact in a dynamic environment.

Qualifications

• 3+ years of experience in ASIC verification.
• Proven track record in developing and deploying large SoCs.
• Full-cycle verification experience from requirements to documentation.

Responsibilities

• Design and maintain UVM-based verification environments.
• Develop verification plans and test cases based on specifications.
• Collaborate with design teams to ensure timely issue resolution.

Skills

UVM-based verification

Digital logic design

C/C++

Scripting languages (Tcl, Perl, Python)

Verification methodologies (UVM, formal verification)

Education

Bachelor’s degree in Electrical or Computer Engineering

Master’s degree (preferred)

Tools

SystemVerilog

SystemC

QEMU

Job description

Overview

European Tech Recruit are working closely with an exciting security semicon start-up, based in Amsterdam, who are looking for a talented ASIC Verification Engineer to join their team.

In this role you will play a critical role in verifying complex SoC architectures, ensuring they meet rigorous functional, performance, and compliance standards. This is a hands-on role suited for someone with strong expertise in UVM-based environments and a passion for improving verification processes.

Responsibilities

• Design, implement, and maintain UVM-based verification environments for advanced digital and SoC designs.
• Develop detailed verification plans and create targeted test cases based on functional specifications.
• Build and execute robust test benches to validate functionality, performance, and specification compliance.
• Proactively debug issues and collaborate closely with design teams to ensure timely resolution.
• Contribute to the evolution of verification methodologies, driving best practices and process improvements.
• Work cross-functionally to align verification activities with broader project goals and schedules.
• Participate in design and architecture reviews, offering insights from a verification standpoint.

Requirements

• Bachelor’s degree in Electrical or Computer Engineering (Master’s preferred).
• 3+ years of experience in ASIC verification.
• Strong knowledge of digital logic design and verification techniques.
• Hands-on experience verifying processor-based systems.
• Proven track record in developing and deploying large SoCs on emulation platforms.
• Deep understanding of protocols such as PCIe, DDR, UCIe, and Ethernet.
• Proficiency in C/C++ and hardware verification languages (e.g., SystemVerilog, SystemC).
• Skilled in scripting languages such as Tcl, Perl, or Python.
• Expertise in at least one verification methodology (UVM, formal verification, or emulation).
• Full-cycle verification experience—from requirements gathering and planning to implementation, testing, and documentation.
• Familiarity with HW/SW co-simulation or emulation and tools like QEMU is advantageous, though not mandatory.

If this role is of any interest please apply directly on LinkedIn or send a copy of your CV to [e-mail].

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