Quantum Process Packaging Lead — Hybrid Growth

Rotterdam Innovation City

Netherlands

Remote

EUR 90,000 - 130,000

Full time

14 days+
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Job summary

QuantWare seeks an Advanced Packaging Lead to drive development of advanced assembly technologies for quantum processors, shaping back-end fabrication, experimental design, and seamless integration within our multi-layer chip stack to achieve top performance in the VIO platform. The role demands hands-on experience with flip-chip technologies, back-end process-flow, and a physics/engineering background.

A PhD is a plus, and collaboration with diverse teams is essential for scaling complex

Qualifications

  • 4+ years of chip assembly development experience in deep-tech or low-volume tech (prefer flip-chip in quantum computing).
  • Strong hands-on experience with back-end process-flow development, UBM, hard-stops, bumps, detachable contacts / MEMS, flip-chip tech.
  • Background in superconducting qubits is a significant plus; degree in physics, microwave/RF or electrical engineering is advantageous.

Responsibilities

  • Plan and lead back-end fabrication and assembly technologies, focusing on flip-chip bonding & contacts reliability.
  • Develop and coordinate integration test plans with cross-functional teams.
  • Define and formalise assembly-centric fabrication and process development across the organisation.
  • Establish scalable, well-documented integration procedures to support system growth.
  • Investigate and resolve integration issues and technical anomalies, ensuring specs and performance targets are met.

Skills

Flip-chip technologies
Back-end process-flow development
Superconducting qubits knowledge
Physics / Microwave / RF / Electrical

Education

PhD preferred
Background in Physics / Microwave / RF / Electrical Engineering

Job description

QuantWare seeks an Advanced Packaging Lead to drive development of advanced assembly technologies for quantum processors, shaping back-end fabrication, experimental design, and seamless integration within our multi-layer chip stack to achieve top performance in the VIO platform. The role demands hands-on experience with flip-chip technologies, back-end process-flow, and a physics/engineering background.

A PhD is a plus, and collaboration with diverse teams is essential for scaling complex

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