IC Package Designer

NXP Semiconductors NV; Gelderland; On-site; EUR 90,000 - 130,000; Full time

Job summary

NXP Semiconductors NV is seeking a Package Design Engineer to join a geographically distributed team focused on advanced substrate-based packages. You will drive layout from concept to production, coordinating with product engineering, IC design, and suppliers to ensure performance, cost and reliability targets are met.

Building on deep expertise with WLP/Flip-Chip PBGA and related tools, you will shape the design flow, collaborate across teams, and implement improvements to achieve first

Qualifications

• Extensive experience in leading edge substrate-based package design (Wire-Bond/Flip Chip PBGA).
• Proficient with Cadence APD SIP, Allegro and AutoCAD for layout and tooling.
• Experience with die-to-package co-design and related tools (Virtuoso/Innovus/ICC2).
• Familiar with HDI/build-up, coreless and mechanical substrate technologies.
• Able to collaborate across global teams and suppliers.
• Capable of driving design flow improvements and tool changes.
• Working knowledge of die/package PCB-level simulation and parasitic extraction tools is a plus.

Responsibilities

• Lead package layout design from definition through co-design to final production.
• Collaborate with product engineering, IC design, and suppliers to meet timelines.
• Develop and maintain EDA tool strategy and design flow methodologies.
• Implement changes to improve design efficiency and cross-functional alignment.

Skills

Package design expertise

Cadence APD SIP

Allegro/AutoCAD

Die-to-package co-design

Cross-functional collaboration

EDA tool strategy

Interpersonal skills

Design flow improvements

Electrical simulation basics

Tools

Virtuoso

Innovus

ICC2

HFSS

Apache

Clarity

Sigrity

Momentum

Job description

ThePackage Design Engineerwill be part of a geographically dispersed team of package design engineers responsible for the design of some of NXP’s most advanced packages including substrate-based Flip and Wire-Bond BGAs, WLCSP, FOWLP, modules / SiP’s, LiP / AiP, etc… This individual will lead package layout design efforts from the initial product definition phase through the package / die co-design to completed design leading to successful first silicon package functionality, qualification and production. They will work closely with the product engineering, IC design, package electrical simulation, substrate suppliers, assembly partners and various other teams to ensure the designs are completed on time and meet all performance, cost and where applicable reliability requirements. This candidate will participate in developing and maintaining the overall EDA tool strategy and design flow methodologies for package design within NXP.

Key Skills:

• Extensive experience and knowledge in semiconductor package design with a specific focus on leading edge substrate-based packages such as Wire-Bond and Flip Chip PBGA.
• Expert at package design tools such as Cadence APD SIP, Allegro and/or AutoCAD.
• Experience with die to package co-design flows and knowledge of tools such as Virtuoso, Innovus and ICC2.
• Familiarity with various package substrate technologies and materials including HDI/build-up, coreless and conventional mechanically drilled.
• Be able to effectively operate beyond organizational boundaries.
• Ability to independently deliver results within the diverse technical global team within NXP as well as substrate, assembly and EDA suppliers.
• Possess interpersonal skills to effectively resolve conflicts both within the organization with external organizations.
• The candidate must be able to define and implement changes and improvements in design flow and tools where required.
• Working knowledge of die, package and/or PCB-level electrical simulation and parasitic extraction tools such as HFSS, Apache, Clarity, Sigrity, and Momentum is a plus.