Staff Silicon Level Failure Analysis Engineer

EPS Malaysia; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

EPS Malaysia seeks a Staff Silicon Level Failure Analysis Engineer to isolate faults and characterize defects in power ICs used in power supply applications. You will craft technical reports for customers and propose corrective actions to improve designs and processes.

Candidates should have 5+ years in failure analysis of power semiconductors and strong hands-on experience with probing, microscopy, XRAY/CSAM, and cross-sectioning. English proficiency is essential; Mandarin preferred.

Qualifications

• BS in Electronic Engineering or equivalent; MSEE preferred.
• Minimum of 5 years in failure analysis of power semiconductors, analog, and/or mixed-signal ICs.
• Hands-on experience with ATE, curve trace, nano/micro-probing, OBIRCH/EMMI microscopy, liquid crystal, CSAM, XRAY, FIB, SEM/EDX, and cross-sectioning.
• Ability to interpret IC ATE data logs and schematics at IC and system levels (CMOS/bipolar).
• Excellent English—spoken, reading and technical writing; Mandarin preferred.

Responsibilities

• Perform fault isolation and defect analysis/characterization on power ICs to identify root causes.
• Provide comprehensive technical failure reports to customers.
• Offer corrective actions based on analysis for internal and external customers.
• Communicate results to drive improvements in product design, process technology, and applications.
• Interface with customers to address questions/concerns about failure analysis results.
• Advise on automotive failure analysis/customer communication when applicable.

Skills

Failure analysis

Curves trace

Probing

OBIRCH/EMMI microscopy

X-ray

FIB

SEM/EDX

Cross-sectioning

Deprocessing

ATE interpretation

Circuit knowledge

Written communication

Mandarin (preferred)

Education

BS in Electronic Engineering or equivalent

MSEE preferred

Tools

ATE

Curve trace

Nano/micro-probing

ObIRCH/EMMI

CSAM

XRAY

FIB

SEMA/EDX

Job description

Staff Silicon Level Failure Analysis Engineer

Performing fault isolation and defect analysis/characterization on power IC's to identify root causes of product failures in power supply applications and/or in production test.

Provide comprehensive technical reports to customers on findings from product failure investigations.

Provide corrective actions to internal and external customers based on the results of the analysis.

Responsibility will also include effective verbal and written communication of results, which will be used to drive improvements in product design, process technology, and applications. Such communication will require, but not limited to, writing cogent and convincing technical reports suitable for external customers.

Communicate with customers as necessary to address customer's questions and concerns about failure analysis results.

Requirements:

Minimum of 5 years of experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices.

Hands-on experience in failure analysis and electrical fault isolation and defect characterization tools and techniques such as the following: ATE, curve trace, nano/micro-probing, OBIRCH/EMMI microscopy, liquid crystal, CSAM, XRAY, FIB, SEM/EDX and manual cross-sectioning and deprocessing techniques using both parallel-polishing and wet chemical etch techniques.

In-depth understanding of both digital and analog circuits, device physics and IC fabrication processes.

Ability to interpret IC ATE test data log is required. Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required.

Excellent English speaking, reading and technical writing skill is required.

Fluent in verbal, reading, and writing skills in Mandarin is preferred.

Candidates with direct experience in customer interface on resolution of customer quality problems will be given special consideration.

Candidates with background and experience in automotive failure analysis/customer communication will be given special consideration.

Preferences will be given to candidates who have a thorough understanding of analog, mixed-signal, or power semiconductor operational characteristics and the ability to perform fault isolation techniques at chip (or IC) level as well as on AC to DC Switch Mode Power Supply system level (or AC/DC SMPS).

Education:

BS in Electronic Engineering or equivalent discipline is required. A candidate with MSEE will be given preference.