SoC Front-End Architect — Multimedia IP & System Integration

XPENG; Kuala Lumpur; Presencial; MYR 120 000 - 210 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

An interesting, unique and very varied

Salary package incl. pension with a/b

Bonus potential

Growth in EV brand in Europe

Resumo da oferta

XPENG is seeking a SoC Engineer with strong ASIC/SoC front-end experience to work on solution design, micro-architecture definition, IP ownership and subsystem integration for multimedia and perception related subsystems.

The role covers camera, ISP, display processor, video codec, DSP/multimedia accelerators and related interfaces. You will collaborate with RTL, verification, backend, software and system teams to deliver IP and subsystem integration and optimize performance.

Qualificações

• Bachelor’s degree or above in Electrical Engineering, Microelectronics, Computer Engineering, Automation, or related fields.
• 3+ years of ASIC/SoC front-end design, IP design, subsystem design, or SoC integration experience.
• Solid understanding of SoC/IP design methodology including spec, micro-architecture, RTL support, verification, and tapeout.
• Familiar with Verilog/SystemVerilog; RTL understanding preferred.
• Familiar with AXI/AB/APB, NoC/fabric, DMA, interrupts, clock/reset, memory subsystem, debug and security.
• Experience in IP/subsystem integration including interface adaptation and clock/power domains.
• Experience in high-throughput multimedia datapath design with pipelines, buffers, QoS, latency, and trade-offs.
• Hands-on project experience in camera/ISP, display, video codec, DSP/accelerator, MIPI/DP, or SoC integration.
• Ability to read and write English technical documents.
• Strong cross-functional communication and issue-closure capability.

Responsabilidades

• Participate in solution definition, module partitioning, and micro-architecture design for multimedia and perception‑related SoC subsystems.
• Own or contribute to technical solution design for camera, ISP, display, video, DSP/accelerator, multimedia interface, or SoC integration IPs and subsystems.
• Define key IP/subsystem micro-architecture, including datapath, control path, DMA, buffers, registers, interrupts, debugging, and power management.
• Participate in internal or third‑party IP evaluation, selection, parameter configuration, wrapper design, and interface adaptation.
• Own or support integration of IPs with SoC fabric, memory, CPU/DSP/NPU/GPU, firmware/software, and debug/trace infrastructure.
• Analyze and optimize multimedia performance, bandwidth, latency, QoS, and power trade-offs.
• Develop and maintain architecture proposals, micro-architecture specs, integration guidelines, and interface specs.
• Work with RTL, verification, backend, software, driver, algorithm, system, and project teams on design reviews and silicon bring-up.

Conhecimentos

ASIC front-end

SoC integration

IP design

RTL/Verilog understanding

Interface protocols

English technical docs

Cross-functional communication

Formação académica

Bachelor's degree or above

Ferramentas

Verilog/SystemVerilog

AXI/NoC interfaces

DMA & memory subsystem

MIPI/DP interfaces

Descrição da oferta de emprego

XPENG is seeking a SoC Engineer with strong ASIC/SoC front-end experience to work on solution design, micro-architecture definition, IP ownership and subsystem integration for multimedia and perception related subsystems.

The role covers camera, ISP, display processor, video codec, DSP/multimedia accelerators and related interfaces. You will collaborate with RTL, verification, backend, software and system teams to deliver IP and subsystem integration and optimize performance.