SoC DFT/DFx Verification Engineer

Thundersoft; Penang; On-site; MYR 110,000 - 170,000; Full time

Job summary

ThunderSoft in Malaysia is seeking a DFT/DFx Verification Engineer to verify DFT/DFD features across complex SoCs, collaborating with design, DFT, RTL, and firmware teams. You will develop testbenches, run GLS and SDF-based verification, and debug failures to improve test readiness.

The role requires 3–5 years of hands-on experience with SystemVerilog and UVM, scripting skills in Python/Tcl/Perl, and strong debugging abilities. Emphasis on cross-team communication and problem solving.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Electronics, Computer Engineering, or a related field.
• Typically 3-5 years of relevant experience in DFT/DFx verification, design verification, or closely related SoC verification.
• Hands-on experience with SystemVerilog and UVM testbench development.
• Experience with Gate-Level Simulation (GLS) and SDF-based verification.
• Knowledge of DFT methodologies such as Scan, ATPG, MBIST, Boundary Scan, or JTAG.
• Strong understanding of digital design, RTL, and ASIC/SoC verification flows.
• Strong debugging and root-cause analysis skills, including troubleshooting with limited logging information.
• Experience with firmware and RTL debugging using simulation tools.
• Proficiency in at least one scripting language, such as Python, Tcl, or Perl.
• Strong analytical, problem-solving, communication, and teamwork skills.

Responsibilities

• Verify DFT/DFx and DFD features across architecture, RTL design, and implementation.
• Develop directed and constrained-random tests using SystemVerilog and UVM.
• Develop and maintain testbenches, verification environments, and test plans for complex SoCs.
• Perform RTL simulation, Gate-Level Simulation (GLS), and SDF-based verification.
• Debug simulation failures, identify root causes, and collaborate with RTL, DFT, and firmware teams to resolve design or test issues.
• Enhance existing verification plans to support new DFT/DFD features and evolving design requirements.
• Reproduce post-silicon failures in pre-silicon simulation environments and support silicon debug and root-cause analysis.
• Apply JTAG and related debug techniques to validate test and debug functionality.
• Develop scripts and automation tools using Python, Tcl, Perl, or similar languages to improve verification efficiency.
• Contribute to verification methodology improvements and cross-site project execution.

Skills

SystemVerilog

UVM

Debugging

Scripting

Education

Bachelor's or Master's degree in Electrical/ Electronics/ Computer Engineering

Tools

SystemVerilog

UVM

GLS

SDF-based verification

Job description

ThunderSoft in Malaysia is seeking a DFT/DFx Verification Engineer to verify DFT/DFD features across complex SoCs, collaborating with design, DFT, RTL, and firmware teams. You will develop testbenches, run GLS and SDF-based verification, and debug failures to improve test readiness.

The role requires 3–5 years of hands-on experience with SystemVerilog and UVM, scripting skills in Python/Tcl/Perl, and strong debugging abilities. Emphasis on cross-team communication and problem solving.