Signal Integrity and Power Integrity Engineer

Infinecs Systems Pvt. Ltd.; Bayan Lepas; On-site; MYR 180,000 - 280,000; Full time

Benefits offered by this job

Health insurance

Performance bonuses

Job summary

Infinecs Systems Pvt. Ltd. in Penang, Malaysia seeks an experienced Power Integrity and Signal Integrity engineer to lead PI/SI analyses and PDN modeling across complex packages and boards.

You will perform DC/AC/transient simulations with PowerSI, PowerDC, ADS, and HSPICE, and analyze high-speed interfaces such as DDR/LPDDR, PCIe, USB, SerDes, and Ethernet. Cadence Allegro for layout reviews is essential.

Qualifications

• Bachelor's degree or higher in Electrical Engineering, Electronics Engineering, or a related field.
• Minimum 5 years of relevant experience in Signal Integrity (SI) and Power Integrity (PI) engineering.
• Hands-on experience in SI/PI analysis, simulation, and package- and board-level modeling.
• Experience with high-speed interface analysis and package/PCB layout review.
• Proficiency in relevant SI/PI simulation tools, including PowerSI, PowerDC, ADS, HFSS, and HSPICE.
• Working knowledge of IBIS-AMI modeling.
• Experience in jitter analysis and signal equalization techniques, including CTLE, DFE, and FFE.

Responsibilities

• Perform system-level Power Integrity (PI) analysis and PDN modeling.
• Conduct DC, AC, and transient simulations using PowerSI, PowerDC, ADS, and HSPICE.
• Perform Signal Integrity (SI) analysis for high-speed interfaces such as DDR/LPDDR, PCIe, USB, SerDes, and Ethernet.
• Extract interconnect models using HFSS and conduct end-to-end channel analysis using ADS.
• Review package and PCB layouts using Cadence Allegro.
• Apply knowledge of IBIS-AMI modeling, jitter analysis, and equalization techniques such as CTLE, DFE, and FFE.

Skills

Signal Integrity

Power Integrity

Jitter analysis

CTLE

DFE

FFE

IBIS-AMI modeling

High-speed I/O

Education

Bachelor's degree in Electrical Engineering

Tools

PowerSI

PowerDC

ADS

HFSS

HSPICE

Cadence Allegro

Job description

Job Description

Responsibilities include (but not limited to):

• Perform system-level Power Integrity (PI) analysis, including package- and board-level Power Delivery Network (PDN) modeling.
• Conduct DC, AC, and transient simulations using PowerSI, PowerDC, ADS, and HSPICE.
• Perform Signal Integrity (SI) analysis for high-speed interfaces such as DDR/LPDDR, PCIe, USB, SerDes, and Ethernet.
• Extract interconnect models using HFSS and conduct end-to-end channel analysis using ADS.
• Review package and PCB layouts using Cadence Allegro.
• Apply knowledge of IBIS-AMI modeling, jitter analysis, and equalization techniques such as CTLE, DFE, and FFE.

Requirements

• Bachelor's degree or higher in Electrical Engineering, Electronics Engineering, or a related field.
• Minimum 5 years of relevant experience in Signal Integrity (SI) and Power Integrity (PI) engineering.
• Hands-on experience in SI/PI analysis, simulation, and package- and board-level modeling.
• Experience with high-speed interface analysis and package/PCB layout review.
• Proficiency in relevant SI/PI simulation tools, including PowerSI, PowerDC, ADS, HFSS, and HSPICE.
• Working knowledge of IBIS-AMI modeling.
• Experience in jitter analysis and signal equalization techniques, including CTLE, DFE, and FFE.