Power Integrity Engineer

UST Malaysia; Bayan Lepas; On-site; MYR 33,000 - 56,000; Full time

Job summary

UST Malaysia is seeking an electronics engineer to perform end-to-end power integrity simulations for high-speed platforms, boards, packages, and silicon. You will analyze power delivery networks, extract 2D/3D models, and evaluate noise across die, package, sockets, and boards. Strong analytical and communication skills required.

Fresh graduates are welcome; a Bachelor's in Electronic Engineering with CGPA 3.30/4.00 is expected. This role offers a solid entry path in advanced electronics design.

Qualifications

• Experience with PI analysis and high-speed power integrity design.
• Familiarity with 2D/3D model extraction and noise analysis.
• Ability to translate simulations into platform-level power and decoupling solutions.
• Strong communication and problem-solving skills.

Responsibilities

• Conduct power integrity simulations end to end for high-speed platforms.
• Analyze power delivery networks across die, package, and board.
• Recommend power routing, package and platform implementations.
• Deliver platform-level power shapes and decoupling guidance.

Skills

Power integrity

Power delivery networks

Circuit design

Analytical skills

Communication skills

Willingness to learn

Education

Bachelor’s Degree in Electronic Engineering

CGPA 3.30/4.00

Tools

Cadence Sigrity

ADS

Hspice

JMP

SIGMA(Matlab)

Layout Viewer

Ansys SI Wave

Job description

Job Description

• Conduct power integrity (PI) simulations from end to end (highspeed platforms, boards, packages, and silicon).
• Analyzes power delivery networks including 2D and 3D model extraction and noise analysis across die/C4 bumps, silicon, package, sockets, and boards.
• Applies knowledge of power integrity design and tradeoffs to perform simulations of power network routing, guide package, and platform physical implementation.
• Delivers platform level power shapes and decoupling solutions as part of the platform design guide.

Requirements

• At least have a minimum of 1-2 years of relevant experience
• Fresh graduates are encouraged to apply.
• Bachelor’s Degree in Electronic Engineering or a closely related discipline.
• Minimum CGPA of 3.30/4.00.
• Strong interest in electronics, circuit design, power delivery networks, and signal/power integrity.
• Good analytical, problem-solving, and communication skills.
• Willingness to learn new simulation tools and engineering methodologies.
• Experience with Cadence Sigrity , ADS, Hspice, JMP, SIGMA(Matlab), Layout Viewer, Hspice, JMP, Cadence Sigrity, Ansys SI wave are good to have.