Senior Testchip Design Engineer – Lead End-to-End DRC/Tape-In

Intel Corporation; Seberang Perai; Hybrid; MYR 180,000 - 300,000; Full time

Job summary

Intel Corporation in Malaysia (Penang) is seeking a Senior Engineer to lead end-to-end testchip design and execution for advanced process nodes. You will own schedules, guide design rule interpretation, and drive layout and test-structure delivery with cross-functional teams.

You will apply automation and AI techniques to accelerate runs, mentor engineers, and coordinate across sites to meet specifications and timelines. Hybrid work model offered in Malaysia.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field.
• 8+ years of hands-on experience in layout design, test structure development, and flow methodology.
• Strong ability to interpret design rules and runsets for advanced nodes.
• Full testchip design flow experience from spec to Tape-In delivery.
• Proven scripting skills (Python/Tcl/Perl) with automation and AI leverage.

Responsibilities

• Lead end-to-end testchip design and execution for advanced process nodes.
• Own overall schedule across multiple component blocks to ensure quality and delivery through Tape-In.
• Define comprehensive test structure requirements and collaborate with yield/process teams.
• Oversee full-flow layout execution from setup to DRC-clean sign-off with quality gates.
• Deliver Testrow Integration including generation, fill, checks, and signal verification on schedule.
• Define and deploy automation and AI strategies for repetitive tasks and reporting.
• Mentor junior and mid-level engineers and drive cross-site collaboration.

Skills

Testchip design

Layout execution

Runset interpretation

Automation scripting

AI for layout

Team leadership

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree preferred

Tools

Python

Tcl

Perl

Job description

Intel Corporation in Malaysia (Penang) is seeking a Senior Engineer to lead end-to-end testchip design and execution for advanced process nodes. You will own schedules, guide design rule interpretation, and drive layout and test-structure delivery with cross-functional teams.

You will apply automation and AI techniques to accelerate runs, mentor engineers, and coordinate across sites to meet specifications and timelines. Hybrid work model offered in Malaysia.