Senior SOC RTL Emulation & Validation Engineer

Intel Corporation

George Town

Hybrid

MYR 180,000 - 300,000

Full time

9 days ago

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Job summary

Intel Corporation in Malaysia seeks an experienced Emulation Engineer to validate next-generation Client SoC full-chip designs, with emphasis on RTL development, emulation models, and automation. The role involves close collaboration with design teams and architects to ensure robust chip functionality before productization, and to drive ML/AI based validation improvements.

The candidate will define validation strategies, test environments, and tools to accelerate RTL validation, while delivering

Qualifications

  • BS/MS in Electronics/Electrical or Computer Engineering or Computer Science with at least 8 years of experience in emulation.

Responsibilities

  • Create emulation models from a Register Transfer Level (RTL) design.
  • Define and document RTL changes required for the emulation model.
  • Develop hardware and software collaterals and integrate them with the emulation model.
  • Test and debug the emulation model and collateral.
  • Define and develop new capabilities and HW/SW tools to accelerate RTL and improve emulation usability for pre-silicon validation.
  • Improve usability by RTL validation and debugging failing RTL tests on the emulation platform.
  • Interface with IU/SoC validation teams to optimize their validation environments, test suites and methodologies for emulation efficiency.
  • Develop and apply automation aids, flows and scripts to support emulation ease and equipment utilization.

Skills

RTL emulation
Hardware debugging
Automation scripting
Test environment design

Education

Bachelor/Master in Electronics/Electrical or Computer Engineering or Computer Science

Job description

Intel Corporation in Malaysia seeks an experienced Emulation Engineer to validate next-generation Client SoC full-chip designs, with emphasis on RTL development, emulation models, and automation. The role involves close collaboration with design teams and architects to ensure robust chip functionality before productization, and to drive ML/AI based validation improvements.

The candidate will define validation strategies, test environments, and tools to accelerate RTL validation, while delivering

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