Senior Physical Design Lead for ASIC/SoC

UST

Penang

On-site

MYR 380,000 - 520,000

Full time

2 days ago
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Job summary

UST is seeking an experienced Physical Design Manager to lead end-to-end ASIC/SoC implementation in Penang, Malaysia. The role requires 10+ years in physical design and strong leadership to drive floorplanning, placement, CTS, routing, and sign-off.

You will collaborate with RTL, DFT, STA, packaging, and foundry teams, manage schedules, mentor engineers, and enable successful tape-outs across global teams.

Qualifications

  • 10+ years of hands-on Physical Design experience in advanced technology nodes.
  • Strong expertise in floorplanning, placement, CTS, routing, timing closure, and physical verification.
  • Experience with industry-standard EDA tools (ICC2/Fusion Compiler, PrimeTime, Innovus) and sign-off tools.

Responsibilities

  • Lead and manage Physical Design activities from floorplanning to tape-out for complex ASIC/SoC projects.
  • Drive PPA (Performance, Power, Area) optimization and sign-off closure, including timing, power, IR drop, EM, and physical verification.
  • Collaborate with RTL, DFT, STA, Packaging, and Foundry teams to ensure successful project execution.
  • Manage project schedules, resource planning, risk assessment, and technical issue resolution.
  • Mentor and guide Physical Design engineers, fostering technical excellence and team growth.
  • Support customer engagements and cross-site collaboration with global engineering teams.

Skills

Physical Design
ASIC/SoC
Leadership
Team collaboration
Communication

Education

Bachelor's or Master's degree in Electrical/Electronic Engineering or related field

Tools

Synopsys ICC2/Fusion Compiler
PrimeTime
Cadence Innovus

Job description

UST is seeking an experienced Physical Design Manager to lead end-to-end ASIC/SoC implementation in Penang, Malaysia. The role requires 10+ years in physical design and strong leadership to drive floorplanning, placement, CTS, routing, and sign-off.

You will collaborate with RTL, DFT, STA, packaging, and foundry teams, manage schedules, mentor engineers, and enable successful tape-outs across global teams.

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