Senior FPGA Verification Architect

754 Altera Semiconductor Technology (M) Sdn. Bhd.; George Town; On-site; MYR 180,000 - 280,000; Full time

Job summary

754 Altera Semiconductor Technology (M) Sdn. Bhd. in Malaysia is seeking an experienced FPGA verification engineer to design and execute functional verification plans for complex FPGA architectures.

You will develop test benches, verification environments, and system simulations, ensuring coverage and adherence to microarchitecture specifications. You will collaborate with FPGA architects, RTL developers, and physical design teams to debug issues, replicate root causes, and implement corrective

Qualifications

• 10+ years of technical experience in electrical/computer engineering fields.
• Experience in Pre Silicon Validation/Verification.
• Proficiency with OVM/UVM, SystemVerilog, and constrained random verification methodologies.

Responsibilities

• Perform functional logic verification of FPGA to meet specifications.
• Develop verification plans, test benches, and verification environments.
• Execute plans, run system simulations, analyze power and timing, and debug issues.
• Replicate root causes and implement corrective actions in pre-silicon environment.
• Collaborate with FPGA architects, RTL developers, and physical design for complex features.
• Document test plans and drive reviews with design and architecture teams.
• Maintain and improve verification infrastructure and methodologies.
• Apply various verification strategies (gate-level, power-aware simulations) to enable feature coverage.

Skills

OVM/UVM

SystemVerilog

Constrained random verification

Pre-silicon validation/verification

Education

BS/MS/PhD in Electrical or Computer Science Engineering or related field

Tools

PCIe/UCIe PHY Verification

Job description

754 Altera Semiconductor Technology (M) Sdn. Bhd. in Malaysia is seeking an experienced FPGA verification engineer to design and execute functional verification plans for complex FPGA architectures.

You will develop test benches, verification environments, and system simulations, ensuring coverage and adherence to microarchitecture specifications. You will collaborate with FPGA architects, RTL developers, and physical design teams to debug issues, replicate root causes, and implement corrective