FPGA IP Design & Verification Engineer

754 Altera Semiconductor Technology (M) Sdn. Bhd.; George Town; On-site; MYR 90,000 - 130,000; Full time

Job summary

754 Altera Semiconductor Technology (M) Sdn. Bhd. in Penang, Malaysia is seeking an FPGA IP Solution Design Engineer to design, verify, and bring up IP blocks for Altera FPGA devices.

You will work across architectural definitions to customer support, developing RTL, testbenches, and verification environments. The role requires 2+ years in digital IC/FPGA design, RTL proficiency, and experience with PCIe, Ethernet, DDR, and AXI protocols.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
• 2+ years of experience in digital IC design with a focus on FPGA design.
• Proficiency in RTL design using Verilog or SystemVerilog.
• Knowledge of FPGA architectures and design flows (Quartus Prime, Vivado).
• Experience with verification methodologies (UVM, SystemVerilog Assertions) and simulation tools.
• Familiarity with PCIe, Ethernet, DDR, AXI protocols.
• Experience with scripting languages (Python, Perl, Tcl).
• Strong analytical and problem-solving skills, and good communication.
• Ability to work independently and collaboratively in a fast-paced environment.

Responsibilities

• Develop FPGA logic designs, RTL code, and simulation environments for functional units, IP blocks, subsystems, and reusable libraries.
• Translate system requirements into implementable FPGA designs at block and microarchitecture levels.
• Create prototypes, behavioral and RTL models, and system specifications to support feature development and validation.
• Prepare logic diagrams and implement RTL that meets system design and test specifications.
• Develop and deliver software and hardware models that support device-level bring-up, including timing and power behavior.
• Apply RTL implementation techniques to achieve required power, performance, and area targets; partner with physical implementation teams to qualify designs.
• Design, implement, and maintain FPGA verification environments, testbenches, simulations, and regression tests.
• Review verification plans and implementations to ensure design features, corner cases, and requirements are verified correctly.
• Analyze failing RTL tests, identify root causes, and implement corrective actions to ensure feature correctness and robust operation.
• Integrate and debug Ethernet MAC, PCS/PMA, and related protocol-stack functionality in FPGA-based platforms.
• Bring up and validate FPGA designs on hardware, including high-speed interfaces, Gigabit transceivers, clocks, resets, and board-level connectivity.
• Use Quartus design, compilation, timing analysis, programming, and debug flows to build, optimize, and troubleshoot FPGA images.
• Perform platform-level debug using FPGA observability tools and lab equipment such as oscilloscopes, logic analyzers, protocol analyzers, signal generators, power supplies, and related test equipment.
• Investigate design, integration, timing, signal-integrity, and system-level issues; drive issues to resolution in collaboration with cross-functional engineering teams.
• Document architectures, design decisions, verification results, bring-up procedures, debug findings, and validation status.

Skills

Verilog/SystemVerilog

FPGA design

RTL design

UVM

SystemVerilog Assertions

Python

PCIe

Ethernet

DDR

AXI

Quartus Prime

Vivado

Scripting

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering

Tools

Altera Quartus Prime

Xilinx Vivado

Job description

754 Altera Semiconductor Technology (M) Sdn. Bhd. in Penang, Malaysia is seeking an FPGA IP Solution Design Engineer to design, verify, and bring up IP blocks for Altera FPGA devices.

You will work across architectural definitions to customer support, developing RTL, testbenches, and verification environments. The role requires 2+ years in digital IC/FPGA design, RTL proficiency, and experience with PCIe, Ethernet, DDR, and AXI protocols.