Innovative FPGA IP Design & Verification Engineer

Altera Corporation; George Town; In loco; MYR 60.000 - 90.000; Tempo pieno

Descrizione del lavoro

Altera in Penang, Malaysia is seeking an FPGA IP Solution Design & Verification Engineer to design, verify, and deliver high-quality IP blocks for advanced FPGA devices. You will participate in architecture, implement RTL, and develop verification environments.

You will work across IP lifecycle, bring up hardware, run simulations, and collaborate with cross-functional teams to meet power, performance, and area targets while ensuring robust customer-ready solutions.

Competenze

• Bachelor's or Master's degree in Electrical/Computer Engineering.
• 2+ years of experience in digital IC design with FPGA focus.
• Proficiency in RTL design using Verilog or SystemVerilog.
• Strong knowledge of FPGA architectures and design flows.
• Experience with verification methodologies (UVM, SystemVerilog Assertions) and simulation tools.
• Familiarity with PCIe, Ethernet, DDR, AXI.
• Scripting skills in Python, Perl, Tcl.
• Strong analytical and communication skills.

Mansioni

• Develop FPGA IP logic designs, RTL code, and simulation environments.
• Define block architecture and microarchitecture from system requirements.
• Create prototypes, behavioral and RTL models, and system specs.
• Prepare RTL and verify features to meet specs.
• Develop hardware/software models for device bring-up and timing/power behavior.
• Achieve power, performance, area targets; collaborate with physical teams.
• Build and maintain FPGA verification environments, testbenches, simulations, regression tests.
• Review verification plans and fix issues across cross-functional teams.
• Integrate and debug Ethernet MAC, PCS/PMA, and protocol stacks.
• Bring up FPGA designs on hardware with high-speed interfaces and board connectivity.
• Use Quartus Prime and timing analysis tools to optimize and troubleshoot FPGA images.

Conoscenze

RTL design

Verilog

SystemVerilog

FPGA architectures

UVM

SystemVerilog Assertions

PCIe

Ethernet

DDR

AXI

Python

Perl

Tcl

Communication skills

Teamwork

Formazione

Bachelor's or Master's in Electrical Engineering or Computer Engineering

Strumenti

Quartus Prime

Xilinx Vivado

Descrizione del lavoro

Altera in Penang, Malaysia is seeking an FPGA IP Solution Design & Verification Engineer to design, verify, and deliver high-quality IP blocks for advanced FPGA devices. You will participate in architecture, implement RTL, and develop verification environments.

You will work across IP lifecycle, bring up hardware, run simulations, and collaborate with cross-functional teams to meet power, performance, and area targets while ensuring robust customer-ready solutions.