Senior FPGA Integration & RTL Design Engineer

Lattice Semiconductor; George Town; On-site; MYR 120,000 - 160,000; Full time

Job summary

Lattice Semiconductor in Malaysia is seeking an accomplished Senior FPGA/IC Design Engineer to lead complex digital design and verification tasks. You will apply Verilog/SystemVerilog, RTL coding, and DFT/ATP techniques on FPGA/CPLD projects.

Ideal candidates have 12+ years in advanced design, strong Cadence Virtuoso skills, and experience with SPICE-based simulations. Join a global team driving innovative programmable solutions in a fast-paced environment.

Qualifications

• BS or MS in Electronics/Computer/Electrical Engineering.
• 12+ years of proven in-depth experience in Custom and Digital Design Implementation.
• Expertise in Verilog and System Verilog is a must.
• Experience in FPGA/CPLD design and integration is a plus.
• Custom Design Flow and semiconductor principles; transistor-level analysis.
• Industry tools for schematic and layout entry (Cadence Virtuoso).
• Characterization, performance and power simulations (SPICE preferred).
• RTL coding and verification; DFT flow and ATPG generation.
• IP/full-chip functional verification experience is a plus.
• Scripting: Perl, TCL, Shell, Python.

Responsibilities

Skills

Verilog

SystemVerilog

FPGA design

RTL coding

Digital design flow

Synthesis

Cadence Virtuoso

SPICE simulations

IP/Fullchip verification

Perl

TCL

Shell

Python

ATPG/DFT

Education

BS/MS in Electronics/Computer/Electrical Engineering

Tools

Cadence Virtuoso

Xcelium

Genus

Innovus

Tempus

Job description

Lattice Semiconductor in Malaysia is seeking an accomplished Senior FPGA/IC Design Engineer to lead complex digital design and verification tasks. You will apply Verilog/SystemVerilog, RTL coding, and DFT/ATP techniques on FPGA/CPLD projects.

Ideal candidates have 12+ years in advanced design, strong Cadence Virtuoso skills, and experience with SPICE-based simulations. Join a global team driving innovative programmable solutions in a fast-paced environment.