Senior E-Core CPU Physical Design Engineer

Intel Corporation; Malaysia; Hybrid; MYR 180,000 - 300,000; Full time

Job summary

Intel Corporation in Malaysia (Penang) seeks an experienced engineer to design and optimize CPU core blocks from synthesis through post-layout verification and tapeout. You will drive low-power techniques, timing closure, and collaboration with RTL and analog teams to meet aggressive targets, working in a high-performance team under a hybrid model.

Responsibilities include synthesis and place&route, floorplanning, timing analysis, physical verification, and scripting for data analysis.

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering.
• 10 years of CPU physical design and timing verification experience.
• Synthesis/APR flows on multi voltage high frequency designs including custom polygon editing.
• Tcl scripting.
• Noise, cross-talk, OCV analysis.
• Floorplanning and physical design and timing closure.
• Formal equivalence, DRC/LVS, IR and electro-migration checks.

Responsibilities

• Logic synthesis and place and route for CORE IP blocks.
• Perform floor-planning and routing studies and implementation at sub-system level timing.
• Work on low power techniques and power reduction in sub-system.
• Physical verification closure of block/sub-system.
• Scripts writing for data analysis and recipe creation.
• Collaborate with micro-architecture, RTL and circuit teams to meet targets.

Skills

Strong analytical ability

Problem solving

Communication skills

Teamwork

Education

BS or MS in Electrical Engineering or Computer Engineering

Tools

Fusion Compiler

DCT

DCE

ICC2

RedHawk

ICV

Conformal

Calibre

PrimeTime

StarRCXT

Job description

Intel Corporation in Malaysia (Penang) seeks an experienced engineer to design and optimize CPU core blocks from synthesis through post-layout verification and tapeout. You will drive low-power techniques, timing closure, and collaboration with RTL and analog teams to meet aggressive targets, working in a high-performance team under a hybrid model.

Responsibilities include synthesis and place&route, floorplanning, timing analysis, physical verification, and scripting for data analysis.