Senior Design Verification Engineer

T-FOOTPRINT; Bayan Lepas; On-site; MYR 90,000 - 130,000; Full time

Job summary

T-FOOTPRINT in Bayan Lepas, Penang, is seeking a Design Verification Engineer with 3+ years of experience to verify IP blocks and SoC designs, develop verification environments, and collaborate with cross-functional teams to debug complex design issues.

You will build and execute verification plans, create UVM-based testbenches, and contribute to system-level validation, ensuring functional correctness and design quality across modules.

Qualifications

• Degree in Electrical/Electronics/Computer Engineering or related field.
• Strong understanding of digital design and verification methodologies.
• Proficiency in C programming for test cases and verification utilities.
• Experience with functional, interface, and/or SoC-level verification.
• Strong debugging and problem-solving skills to resolve complex verification issues.
• Excellent communication and collaboration skills.

Responsibilities

• Verify IP blocks and SoC designs and ensure functional correctness.
• Develop and execute verification plans, test scenarios, and test cases.
• Develop and maintain UVM-based verification environments, testbenches, and verification infrastructure.
• Perform functional, interface, performance, and system-level verification, including debugging and root-cause analysis.
• Support IP integration and SoC verification with cross-functional teams.
• Identify, analyze, and resolve verification issues to ensure design quality.

Skills

Digital design

Verification methodologies

C programming

SoC verification

Debugging skills

Team collaboration

Education

Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering, or related field

Job description

The Role

We are looking for a Design Verification Engineer with 3+ years of experience to join our team in Bayan Lepas, Penang. You will be involved in verifying IP blocks and SoC designs, developing verification environments and test scenarios, and working closely with cross-functional teams to debug and resolve complex design issues.

Key Responsibilities

• Collaborate closely with cross-functional teams to verify IP blocks and SoC designs and ensure functional correctness.
• Develop and execute comprehensive verification plans, test scenarios, and test cases across different design components and system levels.
• Develop and maintain UVM-based verification environments, testbenches, and verification infrastructure.
• Perform functional, interface, performance, and system-level verification, including debugging and root-cause analysis of design issues.
• Support IP integration and SoC verification, working closely with design, architecture, and other engineering teams.
• Identify, analyze, and resolve verification issues to ensure design quality, stability, and reliable system operation.

Required Qualifications

• Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering, or any related field
• Strong understanding of digital design and verification methodologies.
• Proficiency in C programming for developing test cases and verification utilities.
• Experience with functional, interface, and/or SoC-level verification.
• Strong debugging and problem-solving skills, with the ability to analyze and resolve complex verification issues.
• Strong team player with excellent communication and collaboration skills, capable of articulating technical concepts clearly.