Senior CPU Physical Design Engineer — Hybrid Role

Intel Corporation; George Town; Hybrid; MYR 180,000 - 230,000; Full time

Job summary

Intel Corporation in Penang, Malaysia seeks an experienced engineer to design and verify CPU core blocks. You will implement synthesis and APR flows, drive floorplanning and routing, and optimize power and timing under tight schedules.

Responsibilities include coordinating with micro-architecture, RTL, and circuit teams, and mentoring junior staff while contributing to high-performance, energy-efficient silicon. Hybrid on-site/off-site work is available.

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering required.
• Experience with ASIC/CPU physical design and timing verification preferred.
• Proficiency in TCL scripting and EDA flows for synthesis and APR.

Responsibilities

• Logic synthesis and place and route for CORE IP blocks.
• Floor-planning, routing studies, and timing analysis at block level.
• Work on low power techniques and power reduction in sub-systems.
• Physical verification closure of block/sub-system.
• Write scripts for data analysis and recipe creation.
• Demonstrate strong analytical and communication skills.
• Work independently across abstraction levels and in teams.
• Collaborate with micro-architecture, RTL, and circuit teams.

Skills

Synthesis/APR flows

Tcl scripting

Floorplanning

Physical design

Timing closure

Noise & cross-talk analysis

Formal equivalence, DRC/LVS, IR

Education

Bachelor's or Master's in Electrical Engineering or Computer Engineering

Tools

Fusion Compiler

DCT

DCE

ICC2

RedHawk

ICV

Conformal

Calibre

PrimeTime

StarRCXT

Cadence tools

Job description

Intel Corporation in Penang, Malaysia seeks an experienced engineer to design and verify CPU core blocks. You will implement synthesis and APR flows, drive floorplanning and routing, and optimize power and timing under tight schedules.

Responsibilities include coordinating with micro-architecture, RTL, and circuit teams, and mentoring junior staff while contributing to high-performance, energy-efficient silicon. Hybrid on-site/off-site work is available.