Senior CPU Physical Design Engineer — Hybrid Role

Intel Corporation; Seberang Perai; Hybrid; MYR 200,000 - 320,000; Full time

Job summary

Intel Corporation in Malaysia, Penang, is seeking an experienced hardware engineer to help design high-performance CPU core blocks for the next generation Atom processors. You will drive synthesis, place-and-route, floorplanning, and timing/power optimization from RTL to tapeout, collaborating closely with micro-architecture, RTL, and CAD teams.

The role requires strong analytical and communication skills, expertise in Tcl scripting, and a BS or MS in Electrical or Computer Engineering with 10+

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering.
• Minimum 10 years of CPU physical design and timing verification experience.
• Experience with Synthesis/APR flows on multi voltage high-frequency designs, including custom polygon editing.
• Proficiency in Tcl scripting and floorplanning.
• Knowledge of noise, cross-talk, IR and electromigration checks.

Responsibilities

• Logic synthesis and place and route for CORE IP blocks.
• Perform floorplanning and routing studies and implement block/sub-system timing closure.
• Block/sub-system level timing analysis.
• Work on low power techniques and power reduction in sub-systems.
• Physical verification closure of block/sub-system.
• Scripts writing for data analysis and recipe creation.
• Collaborate with micro-architecture, RTL, and CAD teams to meet targets.

Skills

CPU physical design

Timing verification

Synthesis/APR flows

Floorplanning

Power optimization

Tcl scripting

Communication skills

Education

BS in Electrical Engineering

MS in Electrical Engineering

BS in Computer Engineering

MS in Computer Engineering

Tools

Fusion Compiler

DCT

DCE

ICC2

RedHawk

ICV

Conformal

Calibre

PrimeTime

StarRCXT

Cadence Tools

Job description

Intel Corporation in Malaysia, Penang, is seeking an experienced hardware engineer to help design high-performance CPU core blocks for the next generation Atom processors. You will drive synthesis, place-and-route, floorplanning, and timing/power optimization from RTL to tapeout, collaborating closely with micro-architecture, RTL, and CAD teams.

The role requires strong analytical and communication skills, expertise in Tcl scripting, and a BS or MS in Electrical or Computer Engineering with 10+