Senior ASIC/SoC Frontend Project Lead (R&D & Training)

ASEM - Advanced Semiconductor Academy of Malaysia; Kuala Lumpur; On-site; MYR 120,000 - 190,000; Full time

Job summary

Advanced Semiconductor Academy of Malaysia (ASEM) invites an experienced Senior IC Design Engineer (Curriculum & R&D) to lead the development of industry‑relevant IC design training programmes, coordinate semiconductor R&D initiatives, and manage collaborations with universities, industry partners, EDA vendors, and foundries.

The role demands strong ASIC/SoC design knowledge, RTL‑to‑GDSII implementation, IP integration, and cutting‑edge design methodologies.

Qualifications

• Bachelor’s degree in a related engineering field and 5+ years in ASIC/SoC design.
• Strong knowledge of RTL, synthesis, verification, and tape-out.
• Experience with Cadence, Synopsys or Siemens EDA tools.
• Ability to design curricula and coordinate university-industry R&D.
• Excellent written and verbal English communication.

Responsibilities

• Design and continuously improve IC design curricula aligned with industry requirements.
• Develop learning pathways covering digital IC design, RTL, functional verification, synthesis, physical design, and SoC integration.
• Review and enhance modules: Digital IC Design, ASIC Design Flow, SoC Integration, Design Verification, Advanced Topics.
• Create hands-on labs, technical assessments, and industry-based capstone projects.
• Collaborate with semiconductor companies to reflect real-world requirements.
• Assess programme effectiveness and update materials based on employer feedback and emerging technologies.

Skills

ASIC/SoC design

RTL design

Verilog/SystemVerilog

IP integration

SoC architecture

EDA tools

Education

Bachelor’s degree or above in Electrical & Electronic Engineering, Microelectronics, Computer Engineering, Semiconductor Engineering, or related fields

Tools

Cadence

Synopsys

Siemens EDA

Job description

Advanced Semiconductor Academy of Malaysia (ASEM) invites an experienced Senior IC Design Engineer (Curriculum & R&D) to lead the development of industry‑relevant IC design training programmes, coordinate semiconductor R&D initiatives, and manage collaborations with universities, industry partners, EDA vendors, and foundries.

The role demands strong ASIC/SoC design knowledge, RTL‑to‑GDSII implementation, IP integration, and cutting‑edge design methodologies.